Demo Data from SIGIR 2026 / reviewers in the wild / expert
Daniel Flyer
dblp:426/3264
· DBLP profile ↗
1ranked-venue papers
0as first author
1since 2021 · last 2025
0009-0007-1916-2842ORCID · reported
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 1 · 1 since 2021
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Processor architecture and microarchitecture · 77% Parallel and multicore computing · 23% |
Topics — the 2 heaviest of 2, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Processor architecture and microarchitecture › multithreading
simultaneous multithreading |
0.9 | 1 | 2025 | SHADOW: Simultaneous Multi-Threading Architecture with Asymmetric Threads · MICRO 2025 |
Parallel and multicore computing
thread-level parallelism |
0.3 | 1 | 2025 | SHADOW: Simultaneous Multi-Threading Architecture with Asymmetric Threads · MICRO 2025 |
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2025 | SHADOW: Simultaneous Multi-Threading Architecture with Asymmetric Threads
Ishita Chaturvedi, Bhargav Reddy Godala, Abiram Gangavaram, Daniel Flyer, Tyler Sorensen 0001, Tor M. Aamodt, David I. August |
MICRO | 4 |