Demo Data from SIGIR 2026 / reviewers in the wild / expert
Simon Kammermeier
dblp:429/3025
· DBLP profile ↗
1ranked-venue papers
0as first author
1since 2021 · last 2026
0009-0009-5601-4528ORCID · reported
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 1 · 1 since 2021Software engineering, systems software and programming languages · 1 · 1 since 2021
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Software engineering, system software, and programming languages
1 paper |
Concurrent programming · 67% Runtime systems and virtual machines · 33% | |
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Processor architecture and microarchitecture · 100% |
Topics — the 4 heaviest of 4, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Runtime systems and virtual machines
binary translation |
1.0 | 1 | 2026 | Arancini: A Hybrid Binary Translator for Weak Memory Model Architectures · ASPLOS (2) 2026 |
Concurrent programming
memory models |
1.0 | 1 | 2026 | Arancini: A Hybrid Binary Translator for Weak Memory Model Architectures · ASPLOS (2) 2026 |
Concurrent programming › memory models
weak memory models |
1.0 | 1 | 2026 | Arancini: A Hybrid Binary Translator for Weak Memory Model Architectures · ASPLOS (2) 2026 |
Processor architecture and microarchitecture
instruction set architecture |
0.3 | 1 | 2026 | Arancini: A Hybrid Binary Translator for Weak Memory Model Architectures · ASPLOS (2) 2026 |
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2026 | Arancini: A Hybrid Binary Translator for Weak Memory Model ArchitecturesabstractBinary translation is a powerful approach to support cross-architecture emulation of unmodified binaries in increasingly heterogeneous computing environments. However, binary translation systems face correctness issues, due to the strong-on-weak memory model mismatch (e.g., from x86-64 to Arm/RISC-V) for concurrent programs. Besides, the current landscape of binary translation systems is fundamentally limited in terms of completeness for static systems and performance for dynamic ones. Sebastian Reimers, Dennis Sprokholt, Martin Fink 0004, Theofilos Augoustis, Simon Kammermeier, Rodrigo Caetano Rocha, Tom Spink, Redha Gouicem, Soham Chakraborty 0001, Pramod Bhatotia |
ASPLOS (2) | 5 |