Demo Data from SIGIR 2026 / reviewers in the wild / expert
Kazunari Irie
dblp:45/1797
· DBLP profile ↗
10ranked-venue papers
6as first author
0since 2021 · last 1999
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Graphics, computer vision, multimedia, augmented reality and games · 7 · 4 first-authorComputer networks · 2 · 1 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Embedded and real-time systems · 28% Parallel and multicore computing · 28% Interconnection networks and networks-on-chip · 28% |
Topics — the 5 heaviest of 5, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Parallel and multicore computing › load balancing
dynamic load balancing |
0.0 | 1 | 1991 | Multiprocessor DSP with multistage switching network for video coding · IEEE Trans. Commun. 1991 |
Embedded and real-time systems › real-time scheduling
multiprocessor scheduling |
0.0 | 1 | 1991 | Multiprocessor DSP with multistage switching network for video coding · IEEE Trans. Commun. 1991 |
Interconnection networks and networks-on-chip › switching network
multistage interconnection network |
0.0 | 1 | 1991 | Multiprocessor DSP with multistage switching network for video coding · IEEE Trans. Commun. 1991 |
Processor architecture and microarchitecture › special-purpose processor
digital signal processor |
0.0 | 1 | 1991 | Multiprocessor DSP with multistage switching network for video coding · IEEE Trans. Commun. 1991 |
Hardware accelerators and domain-specific architectures
video encoding |
0.0 | 1 | 1991 | Multiprocessor DSP with multistage switching network for video coding · IEEE Trans. Commun. 1991 |
Methods — techniques the papers use, named apart from their topics
scheduling algorithm · 0.0computer simulation · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 1999 | Group communication system based on MAC-over-IPabstractWe have researched a regional personal computer (PC) communication network system to provide group communication services to regional community members cost-effectively. Its LAN-like environment enables pre-registered users to communicate with each other using a PC at any time. An STM-based system, which transfers Ethernet frames to/from users' PCs using HDLC (high-level data link control) protocol over ISDN access lines, has already been developed. Access systems that directly provide an Ethernet interface to users such as shared STM-PDS (synchronous transfer mode passive double star) and cable modem systems have recently been introduced. The communication services provided with the current access systems are basically Internet protocol (IP) services. Such access systems will be required to support protocol-free communication services as well as group communication services. We propose a new system architecture that is applicable to many kinds of access systems including shared STM-PDS and cable modem systems. It is based on MAC-over-IP where Ethernet frames from users' PC are encapsulated into IP packets in the edge device and filtered using the PC MAC (media access control) addresses in the center node. This paper describes the system architecture and its operations. The system can provide protocol-free services and guaranteed security to users. The processing load of the center node is reduced by cutting through the decapsulation of MAC-over-IP packets by controlling the ARP (address resolution protocol) packets. Performance evaluation results for a prototype system are presented. Kazunari Irie, Tomohiro Kumagai, Kouichi Suto, Norihisa Ohta |
LANMAN | 1 |
| 1997 | Large Capacity Multiplex-Port Brouter with SDH Interface for Regional PC Communication Network SystemabstractWe have developed a cost-effective regional personal-computer (PC) communication network system based on fiber-to-the-home (FTTH) systems and examined its realization. The system provides a LAN environment and group communication services to the customers. The intelligent bridge circuit, called the low-end card (LEC), is set up in the subscriber's household. The LEC provides the popular Ethernet interface (10Base-T). The leased circuits are connected between the LEC and the center brouter (bridging router). The LEC and the brouter are controlled by the management server to function as the group communication system. The brouter, which has a multiplex subscriber-port interface, is required to accommodate a lot of customers cost effectively. This paper presents the system design of a multiplex-port brouter with SDH/SONET interface. The brouter can accommodate about 2000 subscribers. Ethernet packets are transferred through each subscriber channel between the LEC and the brouter using the HDLC protocol. A group communication mechanism based on packet filtering via the MAC addresses of PCs is presented. The Ethernet packets are filtered by the brouter to eliminate all packets except those from/to the same group members. The implementation of the group management function into the center brouter and the customers premises LEC is discussed. The traffic reduction effect by the brouter is also estimated from experimental results. Kazunari Irie, Norihisa Ohta, Kouichi Suto, Masato Morisaki, Hisao Tsuji |
ICC (3) | 1 |
| 1994 | High-quality subband codec for HDTV transmissionabstractHigh definition television (HDTV) is expected to be one of the major services offered in future broadband integrated services digital networks (B-ISDN). Transmitting HDTV signals over digital networks requires sophisticated compression techniques to limit bit-rate requirements and to provide high-quality, reliable services to customers. To transmit image signals within a studio and between studios or broadcasting stations, multiple encoding and decoding of signals without visible degradation is required. The authors describe a high-quality HDTV codec that can encode original 1.2 Gb/s HDTV signals at 600 Mb/s. A subband DPCM (differential pulse-code modulation) coding algorithm capable of distortion-free encoding is used. Input signals are decomposed into four bands in the horizontal and vertical directions. A new architecture of perfect reconstructive short-kernel subband filters that reduces subband signal entropy has been adopted. Three bands are coded with adaptive DPCM and one band is coded with PCM. The performance of the codec is evaluated using true video signals. Experimental results show that a very high percentage of samples of component signals can be transmitted distortion free. A signal-to-noise ratio (SNR) of over 45 dB is obtained with signals transmitted after the quantization process. Degradation after nine encoding and decoding processes is only 2 dB in terms of SNR.> Kazunari Irie, Yasuyuki Okumura, Naoya Sakurai, Ryozo Kishimoto |
IEEE Trans. Circuits Syst. Video Technol. | 1 |
| 1991 | HDTV transmission system in an ATM-based network
Ryozo Kishimoto, Kazunari Irie |
Signal Process. Image Commun. | 2 |
| 1991 | Multiprocessor DSP with multistage switching network for video codingabstractA dynamic load balancing method is proposed that uses a multistage switching network to solve the problem of load concentration on certain processors for video coding in multiprocessor digital signal processors. (DSPs) This method balances the processing load by distributing the total load among the processor elements having smaller loads. The load distribution is performed by the multistage switching network, which transmits the load quantity information within the network. A scheduling method for a motion picture coding algorithm using multiprocessor DSPs is also proposed. This scheduling method takes full advantage of the multistage switching network functions when distributing the processing load and sorting the processed results. By using computer simulation, multiprocessor DSP performance with the proposed method is shown to be double that of a conventional multiprocessor DSP when an initially unbalanced load is allocated to the processors, as in picture coding for TV conferences.> Yasuyuki Okumura, Kazunari Irie, Ryozo Kishimoto |
IEEE Trans. Commun. | 2 |
| 1991 | A study on perfect reconstructive subband codingabstractThe authors present a subband coding scheme which has the possibility of distortion-free encoding. The coding scheme, which divides input signals into frequency bands, lends itself to parallel implementation. Computer simulation is conducted using high-quality HDTV component signals. Quadrature mirror filters (QMFs) and short-kernel subband filters are compared in terms of entropy (bit-per-pel) and signal-to-noise ratio. Simulation results show that the short-kernel filters can reduce the entropy while maintaining the original picture quality. The number of subband-signal levels was found to be increased. Reduction of the number of signal levels by transformation during the filtering process is studied. From this study, new architectures for short-kernel filters are developed which can reduce the entropy of subband signals better than conventional two-tap filters.> Kazunari Irie, Ryozo Kishimoto |
IEEE Trans. Circuits Syst. Video Technol. | 1 |
| 1990 | Adaptive subband coder design for HDTV signal transmissionabstractAn adaptive subband coder design for high-quality high-definition television (HDTV) signal transmission through single or multistage coding is presented. In the coder, quadrature mirror filters (QMFs) decompose the input signal into four bands. An adaptive discrete cosine transform is adopted for horizontal-low and vertical-low signal coding. One-dimensional differential pulse-code modulation (DPCM) coding is applied to the signals on the same horizontal line of the horizontal-low and vertical-high band. The other band signals are coded by PCM having a dead zone. Computer simulation results are presented in terms of bit per pel and the quality of the reconstructed picture. The causes of quantization-noise accumulation in tandem connections are also investigated. A coder configuration that reduces noise accumulation is presented.> Kazunari Irie, Ryozo Kishimoto |
ICASSP | 1 |
| 1990 | Adaptive sub-band DCT coding for HDTV signal transmission
Kazunari Irie, Ryozo Kishimoto |
Signal Process. Image Commun. | 1 |
| 1986 | 8 kbits/s Speech coder with pitch adaptive vector quantizerabstractThis paper proposes an 8 kbits/s speech coder with Pitch Adaptive Vector Quantizer (PAVQ), which efficiently quantizes the speech waveform in the time domain. The codebook of the PAVQ is classified into sub-groups each of which has the same maximum absolute magnitude (pitch peak) position. Each input vector is encoded by referring to the sub-group codebook having the same pitch peak position as that of the input vector, instead of referring to the whole codebook. If the codebook size of the PAVQ is equal to that of the conventional full-search VQ, computational complexity of the PAVQ is reduced much less than that of the conventional VQ. Computer simulation results show that the PAVQ is better in terms of speech quality than the conventional VQ under the condition of equal computational complexity. The PAVQ can be implemented in a single DSP and applicable memory IC chips. Satoru Iai, Kazunari Irie |
ICASSP | 2 |
| 1982 | A high quality ADM LSI codec at 32 kbit/s for digital speech communicationsabstractThis paper describes a 32kbit/s adaptive delta modulation (ADM) CODEC which can be applied to digital portable telephones. This ADM CODEC employs a new adaptation algorithm and parameters adjusted for speech signals. The encoding algorithm makes it possible to achieve higher quality with the 32 kbit/s ADM CODEC than with 6 bit µ-law PCM coding. The developed ADM CODEC including a coder, a decoder and switched-capacitor filters on a chip can operate on a single power supply(3.6∼ 5V). The power dissipation is only 30 mW during normal operation and less than 10 mW in the power-down mode. The CMOS chip is an a 16-pin package, 7 × 4.3mm. Naohisa Ohta, Kazunari Irie, Takehiko Uno, Atsushi Iwata, Tomonori Aoyama |
ICASSP | 2 |