The efficient deployment of Recurrent Neural Networks (RNNs), particularly long short-term memory (LSTM) architectures, on edge devices has become increasingly important due to their ability to model nonlinear time-variant dynamics. However, the computational demands of LSTM inference often exceed the capabilities of resource-constrained microcontroller-based IoT devices. Efficient mapping of computational load onto hardware and software resources is a key challenge for improving performance while maintaining low power and a small area footprint. This paper presents a hardware-software framework that accelerates LSTM inference on edge devices by combining a modified LiteRT (formerly TensorFlow Lite) model running on a microcontroller (MCU) with a dedicated LSTM engine in a Neural Processing Unit (NPU) accelerator. To evaluate trade-offs between accuracy, latency, and energy efficiency, we introduce an LSTM benchmark suite for ultra-low-power tiny ML systems. Using this framework, experiments on various LiteRT-based LSTM architectures demonstrate up to 300x speedup compared to software-only implementations. For instance, the runtime for the HAR classification task is reduced from 1.8 seconds to just 6 milliseconds.

Hardware multithreading is a common approach for tolerating memory latency by utilizing idle cycles and avoiding CPU stalling. Nowadays, multithreading architectures are commonly used across many processors and various embedded edge devices to improve performance. This work suggests a new multithreading in-order pipeline microarchitecture design for RISC-V and proposes an efficient event-based issue scheduling algorithm. The proposed scheduling algorithm is based on the unique RISC-V ISA that enables decoding of the instruction type in an early stage of the pipeline. The RISC-V-based multithreading architecture is evaluated using a dedicated software simulator. Simulation results show that the proposed algorithm outperforms the classical Round Robin and the coarse grain algorithms. The proposed architecture is evaluated using the standard MiBench benchmark and other common applications, demonstrating pipeline utilization improvement of up to about 26% in terms of IPC using four threads.

The paradigm of visual attention has been widely investigated and applied to many computer vision applications. In this study, the authors propose a new saliency‐based visual attention algorithm applied to object acquisition. The proposed algorithm automatically extracts points of visual attention (PVA) in the scene, based on different feature saliency maps. Each saliency map represents a specific feature domain, such as textural, contrast, and statistical‐based features. A feature selection, based on probability of detection and false alarm rate and repeatability criteria, is proposed to choose the most efficient feature combination for saliency map. Motivated by the assumption that the extracted PVA represents the most visually salient regions in the image, they suggest using the visual attention approach for object acquisition. A comparison with other well‐known algorithms for point of interest detection shows that the proposed algorithm performs better. The proposed algorithm was successfully tested on synthetic, charge‐coupled device (CCD), and infrared (IR) images. Evaluation of the algorithm for object acquisition, based on ground truth, is carried out using synthetic images, which contain multiple examples of objects, with various sizes and brightness levels. A high probability of correct detection (greater than 90%) with a low false alarm rate (about 20 false alarms per image) was achieved.

This paper presents an efficient method for data acquisition and automatic meter reading (AMR) system from smart electric meters (SM) using power-line communications (PLC) networks. A PLC network uses existing electrical wiring to simultaneously carry both data and electric power. However, since the transmission medium in a PLC network is not designed for high quality data transfer, its efficiency in carrying out AMR applications is limited. The PLC network's traffic load is significantly affected both by the routing algorithm and the polling ordering of the SM. This paper suggests two novel smart polling algorithms based on application layer approach. The proposed algorithms demonstrate efficient utilization of both proactive and reactive routing protocols for AMR applications in narrowband PLCs networks. The benefit of the proposed approach is demonstrated for the two most common protocols, the routing protocol for low-power and lossy networks and the lightweight on-demand ad hoc distance-vector routing protocol.

Extracting minutiae from fingerprint images is one of the most important steps in automatic fingerprint identification and classification. Minutiae are local discontinuities in the fingerprint pattern, mainly terminations and bifurcations. In this work we propose two methods for fingerprint image enhancement. The first one is carried out using local histogram equalization, Wiener filtering, and image binarization. The second method use a unique anisotropic filter for direct grayscale enhancement. The results achieved are compared with those obtained through some other methods. Both methods show some improvement in the minutiae detection process in terms of either efficiency or time required.