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Bixia Zheng

dblp:46/389 · DBLP profile ↗
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3ranked-venue papers
0as first author
1since 2021 · last 2022
0000-0001-5772-5449ORCID · reported

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 3 · 1 since 2021

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Software engineering, system software, and programming languages
1 paper
Compilers and program optimization · 100%
Databases, data mining, and information retrieval
1 paper
Data models and query languages · 100%

Topics — the 5 heaviest of 5, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Compilers and program optimization
compiler infrastructure
0.612022
Compiler Support for Sparse Tensor Computations in MLIR · ACM Trans. Archit. Code Optim. 2022
Compilers and program optimization › compiler infrastructure
MLIR
0.612022
Compiler Support for Sparse Tensor Computations in MLIR · ACM Trans. Archit. Code Optim. 2022
Compilers and program optimization › sparse computation › sparse tensor compilation
sparse tensor code generation
0.612022
Compiler Support for Sparse Tensor Computations in MLIR · ACM Trans. Archit. Code Optim. 2022
Compilers and program optimization › sparse computation
sparse tensor compilation
0.612022
Compiler Support for Sparse Tensor Computations in MLIR · ACM Trans. Archit. Code Optim. 2022
Data models and query languages
sparse tensor algebra
0.212022
Compiler Support for Sparse Tensor Computations in MLIR · ACM Trans. Archit. Code Optim. 2022

Methods — techniques the papers use, named apart from their topics

sparsity-agnostic compilation · 1.1
YearPublicationVenuePosition
2022 Compiler Support for Sparse Tensor Computations in MLIR
abstract
Sparse tensors arise in problems in science, engineering, machine learning, and data analytics. Programs that operate on such tensors can exploit sparsity to reduce storage requirements and computational time. Developing and maintaining sparse software by hand, however, is a complex and error-prone task. Therefore, we propose treating sparsity as a property of tensors, not a tedious implementation task, and letting a sparse compiler generate sparse code automatically from a sparsity-agnostic definition of the computation. This article discusses integrating this idea into MLIR.
Aart J. C. Bik, Penporn Koanantakool, Tatiana Shpeisman, Nicolas Vasilache, Bixia Zheng, Fredrik Kjolstad
ACM Trans. Archit. Code Optim.5
2010 Twin peaks: a software platform for heterogeneous computing on general-purpose and graphics processors
abstract
Modern processors are evolving into hybrid, heterogeneous processors with both CPU and GPU cores used for general purpose computation. Several languages such as Brook, CUDA, and more recently OpenCL are being developed to fully harness the potential of these processors. These languages typically involve the control code running on the CPU and the performance-critical, data-parallel kernel code running on the GPUs.
Jayanth Gummaraju, Laurent Morichetti, Michael Houston, Ben Sander, Benedict R. Gaster, Bixia Zheng
PACT6
1998 High-Level Information - An Approach for Integrating Front-End and Back-End Compilers
abstract
We propose a new universal High-Level Information (HLI) format to effectively integrate front-end and back-end compilers by passing front-end information to the back-end compiler. Importing this information into an existing back-end leverages the state-of-the-art analysis and transformation capabilities of existing front-end compilers to allow the back-end greater optimization potential than it has when relying on only locally-extracted information. A version of the HLI has been implemented in the SUIF parallelizing compiler and the GCC back-end compiler. Experimental results with the SPEC benchmarks show that HLI can provide GCC with substantially more accurate data dependence information than it can obtain on its own. Our results show that the number of dependence edges in GCC can be reduced by an average of 48% for the integer benchmark programs and an average of 54% for the floating-point benchmark programs studied, which provides greater flexibility to GCC's code scheduling pass. Even with the scheduling optimization limited to basic blocks, the use of HLI produces moderate speedups compared to using only GCC's dependence tests when the optimized programs are executed on MIPS R4600 and R10000 processors.
Sangyeun Cho, Jenn-Yuan Tsai, Yonghong Song, Bixia Zheng, Stephen J. Schwinn, Zhiyuan Li 0001, David J. Lilja, Pen-Chung Yew
ICPP4