Demo Data from SIGIR 2026 / reviewers in the wild / expert
Li-Wei Wang 0013
dblp:47/1798-13 · also Liwei Wang 0013
· DBLP profile ↗
2ranked-venue papers
0as first author
0since 2021 · last 2020
—ORCID · unresolved
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 1Graphics, computer vision, multimedia, augmented reality and games · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Hardware accelerators and domain-specific architectures · 100% |
Topics — the 4 heaviest of 5, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Hardware accelerators and domain-specific architectures › machine learning accelerator
CNN accelerator |
0.4 | 1 | 2019 | eCNN: A Block-Based and Highly-Parallel CNN Accelerator for Edge Inference · MICRO 2019 |
Hardware accelerators and domain-specific architectures › machine learning accelerator › DNN inference accelerator
edge inference accelerator |
0.4 | 1 | 2019 | eCNN: A Block-Based and Highly-Parallel CNN Accelerator for Edge Inference · MICRO 2019 |
Hardware accelerators and domain-specific architectures
machine learning accelerator |
0.4 | 1 | 2019 | eCNN: A Block-Based and Highly-Parallel CNN Accelerator for Edge Inference · MICRO 2019 |
Hardware accelerators and domain-specific architectures › accelerator architecture
memory-efficient accelerator design |
0.1 | 1 | 2019 | eCNN: A Block-Based and Highly-Parallel CNN Accelerator for Edge Inference · MICRO 2019 |
Methods — techniques the papers use, named apart from their topics
block-based parallel processing · 0.4DRAM bandwidth reduction · 0.4
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2020 | Fast and Accurate Embedded DCNN for Rgb-D Based Sign Language RecognitionabstractIn this paper, fast and accurate two paths CNN architecture was designed in hardware-oriented manner. Our proposed network is composed of RGB and depth path for gesture recognition by fusing RGB and depth features, following the pre-defined constraints on dedicated hardware. The RTL simulation results indicate it only takes 0.171 milliseconds to infer a single pair of RGB image and depth maps at the operational frequency of 250MHz. Compared with running the same model at Intel i7 and GTX 1080, the speedups are 593.92x and 7.68x respectively. Besides, to increase the recognition accuracy under the diversity of the circumstance, a new RGB-D dataset, captured from Kinect, with complex background was built. Moreover, the number of parameters in our model is only 0.17M and it achieves 99.79% accuracy on the ASL Finger Spelling dataset. Compared with the Gao's CNN gesture recognition architecture, the number of parameter of our model is 2.9 times less and the accuracy is 6.49% higher. Demonstration video for sign language recognition is provided : https://youtu.be/DvO8mI7IZ5Q. Ching-Chen Wang, Ching-Te Chiu, Chao-Tsung Huang, Yu-Chun Ding, Li-Wei Wang 0013 |
ICASSP | 5 |
| 2019 | eCNN: A Block-Based and Highly-Parallel CNN Accelerator for Edge InferenceabstractConvolutional neural networks (CNNs) have recently demonstrated superior quality for computational imaging applications. Therefore, they have great potential to revolutionize the image pipelines on cameras and displays. However, it is difficult for conventional CNN accelerators to support ultra-high-resolution videos at the edge due to their considerable DRAM bandwidth and power consumption. Therefore, finding a further memory- and computation-efficient microarchitecture is crucial to speed up this coming revolution. Chao-Tsung Huang, Yu-Chun Ding, Huan-Ching Wang, Chi-Wen Weng, Kai-Ping Lin, Li-Wei Wang 0013, Li-De Chen |
MICRO | 6 |