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Tracey Y. Zhou

dblp:48/2170 · DBLP profile ↗
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3ranked-venue papers
3as first author
0since 2021 · last 2011
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 3 · 3 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Electronic design automation · 50% Integrated circuit design · 50%

Topics — the 2 heaviest of 2, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Integrated circuit design › analog and mixed-signal circuits
analog circuit design
0.112011
A Fast Analog Circuit Analysis Algorithm for Design Modification and Verification · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2011
Electronic design automation › circuit simulation
analog circuit simulation
0.112011
A Fast Analog Circuit Analysis Algorithm for Design Modification and Verification · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2011

Methods — techniques the papers use, named apart from their topics

delta model · 0.1circuit simulation · 0.1SPICE · 0.1
YearPublicationVenuePosition
2011 A Fast Analog Circuit Analysis Algorithm for Design Modification and Verification
abstract
This paper presents a fast analog circuit analysis algorithm, fundamental circuit-based circuit analysis, for circuits being repeatedly modified and verified in product development. The algorithm reuses previous circuit simulation result on successive changed circuit analysis to achieve simulation operation reduction. The algorithm is implemented with SPICE simulator on linear and nonlinear circuit applications with the proposed device delta models. The experiments show that the algorithm increases the speed of the circuit simulation five to ten times over directly simulations under the same simulation accuracy.
Tracey Y. Zhou, Dian Zhou, Tuna B. Tarim
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.1
2009 Incremental Circuit Simulation Analysis for Design Modification and Verification
abstract
A novel circuit simulation methodology, incremental circuit SPICE analysis, is presented with the foundational circuit simulation algorithm. When a circuit in design is modified from one version to another, only the change in the circuit is simulated and analyzed. The approach is well applied into design process for circuit parametric modification and functionality verification. By reusing simulation result from successive version, the algorithm reduces the duplicated operations in simulation. The examples show the new approach increases simulation speed about 10 times over the traditional method.
Tracey Y. Zhou, Dian Zhou, Xuan Zeng 0001
ISCAS1
2008 Foundational-circuit-based spice simulation
abstract
An innovative algorithm for computer-aided circuit design is presented in this paper. The algorithm is applied to "relative" circuits during optimal circuit design process to reduce circuit simulation time. The new concepts of "relative" circuits, fundamental circuit, derivative circuit, and delta circuit, are introduced. A practical implementation approach is developed with a Spice simulator, accordingly. The algorithm can be adapted to statistical designs or optimal designs. An example is given to prove the correctness and efficiency of the algorithm.
Tracey Y. Zhou, Dian Zhou, Hua Zhang 0019, Xinyue Niu
ISCAS1