Achieving efficiency in database management functions is a fundamental problem underlying many computer applications. Efficiency is difficult to achieve using the traditional general-purpose von Neumann processors. Recent advances in microelectronic technologies have prompted many new research activities in the design, implementation, and application of database machines which are tailored for processing database management functions. To build an efficient system, the software algorithms designed for this type of system need to be tailored to take advantage of the hardware characteristics of these machines. Furthermore, special hardware units should be used, if they are cost- effective, to execute or to assist the execution of these software algorithms.

The architecture of a multicomputer system with switchable main memory modules (SM3) is presented. This architecture supports the efficient execution of parallel algorithms for non-numeric processing by 1) allowing the sharing of switchable main memory modules between computers, 2) supporting network partitioning, and 3) employing global control lines to efficiently support inter-processor communication. By allowing some main memory modules to be switched between processors, the data transfer time is reduced to memory switching time. Network partitioning gives a common bus network system the capability of a MIMD machine while performing global operations. The global control lines establish a quick and efficient high-level protocol in the system. The network is supervised by a Control Computer which oversees network partitioning and other global functions. The hardware involved is quite simple and the network is easily extensible. An analytical study using parallel algorithms for common database operations has been carried out to compare the SM3 System with several other architectures. The results of the study are presented.