Demo Data from SIGIR 2026 / reviewers in the wild / expert
Radomir S. Stankovic
dblp:53/4293
· DBLP profile ↗
12ranked-venue papers
5as first author
0since 2021 · last 2011
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 11 · 4 first-authorTheory of computation · 1 · 1 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
7 papers |
Electronic design automation · 93% Integrated circuit design · 7% | |
| Theoretical computer science
2 papers |
Combinatorics and discrete mathematics · 75% Algorithms and data structures · 25% |
Topics — the 10 heaviest of 11, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Electronic design automation
logic synthesis |
0.4 | 4 | 2011 | Determining the Number of Paths in Decision Diagrams by Using Autocorrelation Coefficients · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2011 An Improved Algorithm for the Construction of Decision Diagrams by Rearranging and Partitioning the Input Cube Set · IEEE Trans. Computers 2010 Optimization of Polynomial Expressions by Using the Extended Dual Polarity · IEEE Trans. Computers 2009 |
Electronic design automation › logic synthesis
decision diagrams |
0.3 | 3 | 2011 | Determining the Number of Paths in Decision Diagrams by Using Autocorrelation Coefficients · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2011 An Improved Algorithm for the Construction of Decision Diagrams by Rearranging and Partitioning the Input Cube Set · IEEE Trans. Computers 2010 Decision Diagram Method for Calculation of Pruned Walsh Transform · IEEE Trans. Computers 2001 |
Electronic design automation › logic synthesis
reed-muller expansion |
0.1 | 2 | 2009 | Optimization of Polynomial Expressions by Using the Extended Dual Polarity · IEEE Trans. Computers 2009 A discussion on the history of research in arithmetic andReed-Muller expressions · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2001 |
Electronic design automation › logic synthesis
programmable logic array |
0.1 | 1 | 2010 | An Improved Algorithm for the Construction of Decision Diagrams by Rearranging and Partitioning the Input Cube Set · IEEE Trans. Computers 2010 |
Integrated circuit design › digital circuit design
logic design |
0.1 | 3 | 2001 | A discussion on the history of research in arithmetic andReed-Muller expressions · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2001 Decision Diagram Method for Calculation of Pruned Walsh Transform · IEEE Trans. Computers 2001 Some remarks on terminology in spectral techniques for logic design: Walsh transform and Hadamard matrices · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1998 |
Electronic design automation › logic synthesis › decision diagrams
binary decision diagram |
0.1 | 2 | 2003 | Reduction of Sizes of Decision Diagrams by Autocorrelation Functions · IEEE Trans. Computers 2003 Decision Diagram Method for Calculation of Pruned Walsh Transform · IEEE Trans. Computers 2001 |
Electronic design automation › logic synthesis › decision diagrams
decision diagram optimization |
0.0 | 1 | 2003 | Reduction of Sizes of Decision Diagrams by Autocorrelation Functions · IEEE Trans. Computers 2003 |
Electronic design automation › logic synthesis
boolean function representation |
0.0 | 1 | 2011 | Determining the Number of Paths in Decision Diagrams by Using Autocorrelation Coefficients · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2011 |
Electronic design automation
spectral methods |
0.0 | 1 | 1998 | Some remarks on terminology in spectral techniques for logic design: Walsh transform and Hadamard matrices · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1998 |
Algorithms and data structures
spectral methods |
0.0 | 1 | 2001 | Decision Diagram Method for Calculation of Pruned Walsh Transform · IEEE Trans. Computers 2001 |
Methods — techniques the papers use, named apart from their topics
extended dual polarity · 0.2exhaustive search · 0.2linear variable transformation · 0.1autocorrelation coefficients · 0.1reordering · 0.1partitioning · 0.1linear transformation · 0.0autocorrelation function · 0.0recursive method · 0.0multi-terminal binary decision diagrams · 0.0multi-terminal binary decision diagram · 0.0binary decision diagrams · 0.0binary decision diagram · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2011 | Determining the Number of Paths in Decision Diagrams by Using Autocorrelation CoefficientsabstractThis paper deals with the number of paths in multiterminal binary decision diagrams (MTBDDs) and shared binary decision diagrams (SBDDs) representing a set of Boolean functions. It is shown that the number of paths in an MTBDD (SBDD) can be uniquely determined by values of specific weighted-autocorrelation coefficients. An analytical expression for the number of paths as a linear function of the values of the weighted-autocorrelation coefficients is presented. Based on this expression, a method of minimization of the number of paths is proposed. The method is based on replacing the initial set of input variables with their linear combinations. By using this method, a deterministic paths-reduction procedure, which provides MTBDDs and SBDDs with a reduced number of paths, is presented. The efficiency of the suggested approach is demonstrated on benchmark functions. Osnat Keren, Ilya Levin, Radomir S. Stankovic |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. | 3 |
| 2010 | An Improved Algorithm for the Construction of Decision Diagrams by Rearranging and Partitioning the Input Cube SetabstractDecision diagrams (DDs) are a data structure that allows compact representation of discrete functions. The efficient construction of DDs in terms of space and time is often considered problem. A particular problem is that during the construction of a DD, a large number of temporary nodes are created. We address this problem in the case when the functions are specified in the PLA format. A common practice is to construct a DD by recursively processing all the cubes in PLA specification. The DD representing a subfunction defined by a single cube is merged with the DD for the subfunction defined by all the previously processed cubes. We proposed a method of reordering and partitioning the set of cubes in PLA specification that results in the reduction of both space and time complexities of the construction of DDs. First, we arrange cubes by their suffices. Then we partition the set of cubes, construct DDs for the subfunctions representing each partition separately, and merge them into a final DD. The reordering and partitioning ensures that these intermediary decision diagrams never exceed a certain size which is controlled by the size of the partitions. In this way, the number of operations on the nodes during the merging decision diagrams is reduced. This reduction results in a decrease both in the number of temporary nodes and construction time. The proposed method is used for the construction of DDs for the set of standard benchmark functions. The experiments show that the total number of created nodes is reduced on average by 34.65 percent, while the construction time is decreased by 48.6 percent. Suzana Stojkovic, Dragan Jankovic, Radomir S. Stankovic |
IEEE Trans. Computers | 3 |
| 2009 | Optimization of Polynomial Expressions by Using the Extended Dual PolarityabstractReed-Muller expressions and their various extensions and generalizations for binary and multiple-valued logic functions are an important class of discrete function representations that are often used in practical applications. These expressions can be uniformly viewed as discrete polynomial expressions over finite fields GF(2) and GF(q) or the field of rational numbers in the case of expressions with integer-valued coefficients. The optimization of them in the number of product terms count is performed by selecting either positive or negative literals (polarities) for variables in the functions to be represented. Since there are no ways to select in advance the polarity for variables that will result in most compact expression for a given function, all possible expressions have to be generated and the simplest of them selected. This is a task computationally very demanding, the complexity of which is O(q^n \times C), where C is the time to calculate a particular polarity. Since the reduction of the first factor may lead to missing the most compact expression, the reduction of C is the single option to speed up the procedure. In this paper, we propose an approach to the solution of this problem by exploiting the notion of extended dual polarity, which provides a simple way of ordering polarities to obtain an effective way of finding the optimal one by reducing the time to move between them. The method still implies exhaustive search, but it is an optimized search, which may be expressed in very simple rules resulting in efficient implementation. Experimental results illustrate the effectiveness of the proposed method. Dragan Jankovic, Radomir S. Stankovic, Claudio Moraga |
IEEE Trans. Computers | 2 |
| 2007 | Use of gray decoding for implementation of symmetric functionsabstractThis paper discusses reduction of the number of product terms in representation of totally symmetric Boolean functions by Sum of Products (SOP) and Fixed Polarity Reed- Muller (FPRM) expansions. The suggested method reduces the number of product terms, correspondingly, the implementation cost of symmetric functions based on these expressions by exploiting Gray decoding of input variables. Although this decoding is a particular example of all possible linear transformation of Boolean variables, it is efficient in the case of symmetric functions since it provides a significant simplification of SOPs and FPRMs. Mathematical analysis as well as experimental results demonstrate the efficiency of the proposed method. Osnat Keren, Ilya Levin, Radomir S. Stankovic |
VLSI-SoC | 3 |
| 2003 | Reduction of Sizes of Decision Diagrams by Autocorrelation FunctionsabstractThis paper discusses optimization of decisions diagrams (DDs) by total autocorrelation functions. We present an efficient algorithm for construction of linearly transformed binary decision diagrams (LT-BDDs) and Linearly transformed multiterminal BDDs (LT-MTBDDs) for systems of Boolean functions, based on linearization of these functions by the corresponding autocorrelation functions. Then, we present a method for reduction of sizes of DDs by a level-by-level reduction of the width of DDs using the total autocorrelation functions. The approach provides for a simple procedure for minimization of LT-BDDs and LT-MTBDDs and upper bounds on their sizes. Experimental results for benchmarks illustrate that the proposed method on average is very efficient. Mark G. Karpovsky, Radomir S. Stankovic, Jaakko Astola |
IEEE Trans. Computers | 2 |
| 2002 | Decision Diagram Optimization Using Copy PropertiesabstractIn this paper, we propose an approach to the reduction of sizes of multi-terminal binary decision diagrams (MTBDDs) by using the copy properties of discrete functions. The underlying principles come from copy theory of discrete signals considered previously. We propose two modifications of MTBDDs, called copy DDs (CDDs) and half copy DDs (HCDDs), using the corresponding copy operations from copy theory. Functions having different types of copy properties can be efficiently represented by the proposed Copy DDs. Examples are Walsh and Reed-Muller functions as well as different binary codes. Dragan Jankovic, Radomir S. Stankovic, Rolf Drechsler |
DSD | 2 |
| 2001 | Non-Abelian Groups in Optimization of Decision Diagrams Representations of Discrete Functions
Radomir S. Stankovic |
Formal Methods Syst. Des. | 1 |
| 2001 | Decision Diagram Method for Calculation of Pruned Walsh TransformabstractDiscrete Walsh transform is an orthogonal transform often used in spectral methods for different applications in signal processing and logic design. FFT-like algorithms make it possible to efficiently calculate the discrete Walsh spectrum. However, for their exponential complexity, these algorithms are practically unsuitable for large functions. For this reason, a Binary Decision Diagram (BDD) based recursive method for Walsh spectrum calculation has been introduced in Clarke et al. (1993). A disadvantage of this algorithm is that the resulting Multi-Terminal Binary Decision Diagram (MTBDD) representing the Walsh spectrum for f can be large for some functions. Another disadvantage turns out if particular Walsh coefficients are to be computed separately. The algorithm always calculates the entire spectrum and, therefore, it is rather inefficient for applications where a subset of Walsh spectral coefficients, i.e., the pruned Walsh spectrum, is required. In this paper, we propose another BDD-based method for Walsh spectrum calculation adapted for application where the pruned Walsh spectrum is needed. The method takes advantage of the property that for most switching functions, the size of a BDD for f is usually quite a bit smaller than the size of the MTBDD for the Walsh spectrum. In our method, a MTBDD representing the Walsh spectrum is not: constructed. Instead, two additional fields are assigned to each node in the BDD for the processed function f. These fields are used to store the results of intermediate calculations. Pairs of spectral coefficients are calculated and stored in the fields assigned to the root node. Therefore, the calculation complexity of the proposed algorithm is proportional to the size of the BDD for f whose spectrum is calculated. Experimental results demonstrate the efficiency of the approach. Dragan Jankovic, Radomir S. Stankovic, Rolf Drechsler |
IEEE Trans. Computers | 2 |
| 2001 | A discussion on the history of research in arithmetic andReed-Muller expressionsabstractThis paper discusses early work by Komamiya in Reed-Muller and arithmetic expressions for switching functions. Radomir S. Stankovic, Tsutomu Sasao |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. | 1 |
| 1998 | Decision Diagrams for Discrete Functions: Classification and Unified InterpretationabstractThis paper classifies different decision diagrams (DDs) for discrete functions with respect to the domain and range of represented functions. Relationships among different DDs and their relations to spectral transforms are also shown. That provides a unified interpretation of DDs, and their further classification with respect to the spectral transforms. Radomir S. Stankovic, Tsutomu Sasao |
ASP-DAC | 1 |
| 1998 | Some remarks on terminology in spectral techniques for logic design: Walsh transform and Hadamard matricesabstractThis paper describes the relationship between the Walsh transform and Hadamard matrices. It is an attempt to establish the correct terminology in spectral techniques for logic design. Radomir S. Stankovic |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. | 1 |
| 1995 | Some remarks about spectral transform interpretation of MTBDDs and EVBDDsabstractIn this paper we give a spectral transform interpretation of AND-EXOR representations of switching functions and related decision diagrams in the vector space over GF(2). The consideration is uniformly extended to the Fourier series-like expressions of functions in the complex vector space and the decision diagrams for integer-valued functions. It is shown that the multi-terminal decision diagrams, MTBDDs, and edge-valued decision diagrams, EVBDDs, for integer-valued functions are derived by using the same sets of basic functions already applied for the decision diagrams attached to some AND-EXOR expressions, but considered over the complex field. The algebraic transform decision diagrams, ATDDs, are considered as the integer counterparts of the functional decision diagrams, FDDs, attached to the algebraic transform in the same way as the FDDs are attached to the Reed-Muller expressions. It is shown that the EVBDDs are the ATDDs in different notation. Radomir S. Stankovic |
ASP-DAC | 1 |