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Deborah A. Wallach

dblp:53/6138 · DBLP profile ↗
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12ranked-venue papers
3as first author
0since 2021 · last 2008
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 5 · 1 first-authorComputer networks · 3 · 2 first-authorSoftware engineering, systems software and programming languages · 3Artificial intelligence and machine learning · 2Graphics, computer vision, multimedia, augmented reality and games · 1Applied, interdisciplinary, general and emerging computing · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
8 papers
Storage systems · 32% Energy-efficient computing · 30% Parallel and multicore computing · 14%
Databases, data mining, and information retrieval
2 papers
Distributed and cloud data management · 57% Database system architecture and tuning · 43%
Software engineering, system software, and programming languages
3 papers
Operating systems · 71% Runtime systems and virtual machines · 29%
Computer networks
2 papers
Internet architecture and protocols · 78% Transport protocols and congestion control · 22%
Computer graphics and multimedia
1 paper
Image and video processing · 100%

Topics — the 20 heaviest of 26, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Storage systems
distributed storage
0.122008
Bigtable: A Distributed Storage System for Structured Data · ACM Trans. Comput. Syst. 2008
Bigtable: A Distributed Storage System for Structured Data (Awarded Best Paper!) · OSDI 2006
Energy-efficient computing › power management › device power management
processor power management
0.012004
uSleep: A Technique for Reducing Energy Consumption in Handheld Devices · MobiSys 2004
Energy-efficient computing › power management › low-power mode management
sleep mode
0.012004
uSleep: A Technique for Reducing Energy Consumption in Handheld Devices · MobiSys 2004
High-performance computing › cluster computing
commodity cluster
0.012008
Bigtable: A Distributed Storage System for Structured Data · ACM Trans. Comput. Syst. 2008
Parallel and multicore computing › parallel programming models
message passing
0.021997
Optimistic Active Messages: A Mechanism for Scheduling Communication with Computation · PPoPP 1995
ASHs application-specific handlers for high-performance messaging · IEEE/ACM Trans. Netw. 1997
Operating systems › network stack
kernel networking
0.011997
ASHs application-specific handlers for high-performance messaging · IEEE/ACM Trans. Netw. 1997
Internet architecture and protocols › protocol design
protocol composition
0.011996
ASHs: Application-Specific Handlers for High-Performance Messaging · SIGCOMM 1996
Operating systems › extensible operating systems
kernel extensibility
0.011996
ASHs: Application-Specific Handlers for High-Performance Messaging · SIGCOMM 1996
Runtime systems and virtual machines › runtime environment
runtime scheduling
0.011995
Optimistic Active Messages: A Mechanism for Scheduling Communication with Computation · PPoPP 1995
Parallel and multicore computing › parallel programming runtimes
active messages
0.011995
Optimistic Active Messages: A Mechanism for Scheduling Communication with Computation · PPoPP 1995
Memory systems › shared memory
distributed shared memory
0.011995
CRL: High-Performance All-Software Distributed Shared Memory · SOSP 1995
Memory systems › shared memory › distributed shared memory
software distributed shared memory
0.011995
CRL: High-Performance All-Software Distributed Shared Memory · SOSP 1995
Parallel and multicore computing
multicomputer
0.011993
The J-Machine Multicomputer: An Architectural Evaluation · ISCA 1993
Image and video processing › image registration
edge-based registration
0.011990
Predicting and Estimating the Accuracy of a Subpixel Registration Algorithm · IEEE Trans. Pattern Anal. Mach. Intell. 1990
Image and video processing
image registration
0.011990
Predicting and Estimating the Accuracy of a Subpixel Registration Algorithm · IEEE Trans. Pattern Anal. Mach. Intell. 1990
Image and video processing › image registration
subpixel registration
0.011990
Predicting and Estimating the Accuracy of a Subpixel Registration Algorithm · IEEE Trans. Pattern Anal. Mach. Intell. 1990
Transport protocols and congestion control
TCP
0.011996
ASHs: Application-Specific Handlers for High-Performance Messaging · SIGCOMM 1996
Transport protocols and congestion control
transport protocols
0.011996
ASHs: Application-Specific Handlers for High-Performance Messaging · SIGCOMM 1996
Memory systems
cache coherence
0.011995
CRL: High-Performance All-Software Distributed Shared Memory · SOSP 1995
Interconnection networks and networks-on-chip
network interface
0.011993
The J-Machine Multicomputer: An Architectural Evaluation · ISCA 1993

Methods — techniques the papers use, named apart from their topics

tablet partitioning · 0.2sparse table data model · 0.2microbenchmarking · 0.1prototype implementation · 0.0energy measurement · 0.0end-to-end measurement · 0.0optimistic scheduling · 0.0message handlers · 0.0edge detection · 0.0architectural simulation · 0.0application benchmarking · 0.0error propagation analysis · 0.0
YearPublicationVenuePosition
2008 Bigtable: A Distributed Storage System for Structured Data
abstract
Bigtable is a distributed storage system for managing structured data that is designed to scale to a very large size: petabytes of data across thousands of commodity servers. Many projects at Google store data in Bigtable, including web indexing, Google Earth, and Google Finance. These applications place very different demands on Bigtable, both in terms of data size (from URLs to web pages to satellite imagery) and latency requirements (from backend bulk processing to real-time data serving). Despite these varied demands, Bigtable has successfully provided a flexible, high-performance solution for all of these Google products. In this article, we describe the simple data model provided by Bigtable, which gives clients dynamic control over data layout and format, and we describe the design and implementation of Bigtable.
Fay Chang, Jeffrey Dean, Sanjay Ghemawat, Wilson C. Hsieh, Deborah A. Wallach, Michael Burrows, Tushar Chandra, Andrew Fikes, Robert Gruber
ACM Trans. Comput. Syst.5
2006 Bigtable: A Distributed Storage System for Structured Data (Awarded Best Paper!)
Fay Chang, Jeffrey Dean, Sanjay Ghemawat, Wilson C. Hsieh, Deborah A. Wallach, Michael Burrows, Tushar Chandra, Andrew Fikes, Robert Gruber
OSDI5
2004 uSleep: A Technique for Reducing Energy Consumption in Handheld Devices
abstract
Energy management has become one of the great challenges in portable computing. This is the result of the increasing energy requirements of modern portable devices without a corresponding increase in battery technology. uSleep is an energy reduction technique for handheld devices that is most effective when the handheld's processor is lightly loaded, such as when the user is reading a document or looking at a web page. When possible, rather than using the processor's idle mode, uSleep tries to put the processor in sleep mode for short periods (less than one second) without affecting the user's experience. To enhance the perception that the system is on, an image is maintained on the display and activity is resumed as a result of external events such as touch-screen and button activity. We have implemented, analyzed and evaluated uSleep on a prototype pocket computer, where it has reduced energy consumption by up to 60%.
Lawrence S. Brakmo, Deborah A. Wallach, Marc A. Viredaz
MobiSys2
2003 A model for battery lifetime analysis for organizing applications on a pocket computer
abstract
A battery-powered portable electronic system shuts down once the battery is discharged; therefore, it is important to take the battery behavior into account. A system designer needs an adequate high-level battery model to make battery-aware decisions targeting the maximization of the system's online lifetime. We propose such a model that allows a designer to analytically predict the battery time-to-failure for a given load. Our model also allows for a tradeoff between the accuracy and the amount of computation performed. The quality of the proposed model is evaluated using typical pocket computer applications and a detailed low-level simulation of a lithium-ion electrochemical cell. In addition, we verify the proposed model against actual measurements taken on a real lithium-ion battery.
Daler N. Rakhmatov, Sarma B. K. Vrudhula, Deborah A. Wallach
IEEE Trans. Very Large Scale Integr. Syst.3
2002 Battery lifetime prediction for energy-aware computing
abstract
Predicting the time of full discharge of a finite-capacity energy source, such as a battery, is important for the design of portable electronic systems and applications. In this paper we present a novel analytical model of a battery that not only can be used to predict battery lifetime, but also can serve as a cost function for optimization of the energy usage in battery-powered systems. The model is physically justified, and involves only two parameters, which are easily estimated. The paper includes the results of extensive experimental evaluation of the model with respect to numerical simulations of the electrochemical cell, as well as measurements taken on a real battery. The model was tested using constant, interrupted, periodic and non-periodic discharge profiles, which were derived from standard applications run on a pocket computer.
Daler N. Rakhmatov, Sarma B. K. Vrudhula, Deborah A. Wallach
ISLPED3
1997 ASHs application-specific handlers for high-performance messaging
abstract
Application-specific safe message handlers (ASHs) are designed to provide applications with hardware-level network performance. ASHs are user-written code fragments that safely and efficiently execute in the kernel in response to message arrival. ASHs can direct message transfers (thereby eliminating copies) and send messages (thereby reducing send-response latency). In addition, the ASH system provides support for dynamic integrated layer processing (thereby eliminating duplicate message traversals) and dynamic protocol composition (thereby supporting modularity). ASHs offer this high degree of flexibility while still providing network performance as good as, or (if they exploit application-specific knowledge) even better than, hard-wired in-kernel implementations. A combination of user-level microbenchmarks and end-to-end system measurements using TCP demonstrates the benefits of the ASH system.
Deborah A. Wallach, Dawson R. Engler, M. Frans Kaashoek
IEEE/ACM Trans. Netw.1
1996 ASHs: Application-Specific Handlers for High-Performance Messaging
abstract
Application-specific safe message handlers (ASHs) are designed to provide applications with hardware-level network performance. ASHs are user-written code fragments that safely and efficiently execute in the kernel in response to message arrival. ASHs can direct message transfers (thereby eliminating copies) and send messages (thereby reducing send-response latency). In addition, the ASH system provides support for dynamic integrated layer processing (thereby eliminating duplicate message traversals) and dynamic protocol composition (thereby supporting modularity). ASHs provide this high degree of flexibility while still providing network performance as good as, or (if they exploit application-specific knowledge) even better than, hard-wired in-kernel implementations. A combination of user-level microbenchmarks and end-to-end system measurements using TCP demonstrate the benefits of the ASH system.
Deborah A. Wallach, Dawson R. Engler, M. Frans Kaashoek
SIGCOMM1
1995 Optimistic Active Messages: A Mechanism for Scheduling Communication with Computation
abstract
Low-overhead message passing is critical to the performance of many applications. Active Messages reduce the software overhead for message handling: messages are run as handlers instead of as threads, which avoids the overhead of thread management and the unnecessary data copying of other communication models. Scheduling the execution of Active Messages is typically done by disabling and enabling interrupts, or by polling the network. This primitive scheduling control, combined with the fact that handlers are not schedulable entities, puts severe restrictions on the code that can be run in a message handler. This paper describes a new software mechanism, Optimistic Active Messages (OAM), that eliminates these restrictions; OAMs allow arbitrary user code to execute in handlers, and also allow handlers to block. Despite this gain in expressiveness, OAMs perform as well as Active Messages.
Deborah A. Wallach, Wilson C. Hsieh, Kirk L. Johnson, M. Frans Kaashoek, William E. Weihl
PPoPP1
1995 CRL: High-Performance All-Software Distributed Shared Memory
abstract
article Free Access Share on CRL: high-performance all-software distributed shared memory Authors: K. L. Johnson MIT Laboratory for Computer Science, Cambridge, MA MIT Laboratory for Computer Science, Cambridge, MAView Profile , M. F. Kaashoek MIT Laboratory for Computer Science, Cambridge, MA MIT Laboratory for Computer Science, Cambridge, MAView Profile , D. A. Wallach MIT Laboratory for Computer Science, Cambridge, MA MIT Laboratory for Computer Science, Cambridge, MAView Profile Authors Info & Claims ACM SIGOPS Operating Systems ReviewVolume 29Issue 5Dec. 3, 1995 pp 213–226https://doi.org/10.1145/224057.224073Published:03 December 1995Publication History 161citation782DownloadsMetricsTotal Citations161Total Downloads782Last 12 Months60Last 6 weeks14 Get Citation AlertsNew Citation Alert added!This alert has been successfully added and will be sent to:You will be notified whenever a record that you have chosen has been cited.To manage your alert preferences, click on the button below.Manage my AlertsNew Citation Alert!Please log in to your account Save to BinderSave to BinderCreate a New BinderNameCancelCreateExport CitationPublisher SiteeReaderPDF
Kirk L. Johnson, M. Frans Kaashoek, Deborah A. Wallach
SOSP3
1993 The J-Machine Multicomputer: An Architectural Evaluation
abstract
The MIT J-Machine multicomputer has been constructed to study the role of a set of primitive mechanisms in providing efficient support for parallel computing. Each J-Machine node consists of an integrated multicomputer component, the Message-Driven Processor (MDP), and 1 MByte of DRAM. The MDP provides mechanisms to support efficient communication, synchronization, and naming. A 512 node J-Machine is operational and is due to be expanded to 1024 nodes in March 1993. In this paper we discuss the design of the J-Machine and evaluate the effectiveness of the mechanisms incorporated into the MDP. We measure the performance of the communication and synchronization mechanisms directly and investigate the behavior of four complete applications.
Michael D. Noakes, Deborah A. Wallach, William J. Dally
ISCA2
1990 Line recognition
abstract
The use of edge detection and localizing filters for the recognition of lines (narrow contrasting strips) in visual scenes is shown to produce systematic errors while being suboptimum with respect to noise. The authors derive optimum filters for the detection and localization of lines based on matched filtering in the line normal direction and a Wiener filter in the direction tangential to the line. The matched filters for the detection and localization of line normals in white noise have the form of the system response and its first derivative, respectively. The orthogonal least-restrictive Wiener filter is also closely approximated by the form of the system response in cased where Gaussian response and white noise dominate. Close approximations to the optimum filters for line recognition under these common conditions are readily realized. Line filters were integrated with the Boie-Cox edge detector. Results for images with mixed lines and edges show that the integrated Boie-Cox system is free of the systematic errors common to other edge recognition systems.>
Ingemar J. Cox, Robert A. Boie, Deborah A. Wallach
ICPR (1)3
1990 Predicting and Estimating the Accuracy of a Subpixel Registration Algorithm
abstract
It is shown that an efficient practical registration algorithm previously described by H.G. Barrow et al. (1977) can provide high-accuracy registration. Experiments with a quantized video image of a solid triangle yielded registration that was accurate to 3% of the interpixel spacing (i.e. accurate to 0.5 mils) in the x and y directions and 0.015 degrees in rotation. It may also be important to predict the accuracy in advance, to see whether specifications can be met and to estimate accuracy during registration, in order to control quality. The authors provide practical formulas for both purposes for two kinds of image point data: edge detection (ED) data and direct measurement (DM) data. In two experiments using ED data, the predicted, estimated, and observed accuracies are all in agreement. The prediction theory developed suggests five precautions to avoid loss of registration accuracy. Perhaps most important is Precaution c, the necessity of the ED case not to have a large fraction of the total segment length of the model aligned with the horizontal or vertical directions of the pixel grid. When the model consists largely of horizontal and vertical segments, a good way to observe this precaution is to tilt the pixel grid a few degrees away from perfect alignment, e.g. by tilting the video camera. A third experiment verifies that violating Precaution c can seriously degrade accuracy.>
Ingemar J. Cox, Joseph B. Kruskal, Deborah A. Wallach
IEEE Trans. Pattern Anal. Mach. Intell.3