Demonstration venue · read-only. Every page can be browsed; the buttons that would change it are switched off. Create an account to run TaxoReview on your own data. A simulation from public publication records: the people listed were not invited and did not agree to review.
? Tutorial for this page

Makoto Takashima

dblp:54/1723 · DBLP profile ↗
← Back
4ranked-venue papers
2as first author
0since 2021 · last 1994
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 3 · 2 first-authorGraphics, computer vision, multimedia, augmented reality and games · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
3 papers
Electronic design automation · 100%

Topics — the 8 heaviest of 8, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Electronic design automation
hardware verification and test
0.021988
A Circuit Comparison System with Rule-Based Functional Isomorphism Checking · DAC 1988
Programs for verifying circuit connectivity of mos/lsi mask artwork · DAC 1982
Electronic design automation › hardware verification and test › formal verification
equivalence checking
0.011988
A Circuit Comparison System with Rule-Based Functional Isomorphism Checking · DAC 1988
Electronic design automation › physical design
layout verification
0.021982
Programs for verifying circuit connectivity of mos/lsi mask artwork · DAC 1982
An integrated mask artwork analysis system · DAC 1980
Electronic design automation
physical design
0.021982
Programs for verifying circuit connectivity of mos/lsi mask artwork · DAC 1982
An integrated mask artwork analysis system · DAC 1980
Electronic design automation › physical verification
mask verification
0.011982
Programs for verifying circuit connectivity of mos/lsi mask artwork · DAC 1982
Electronic design automation
physical verification
0.011980
An integrated mask artwork analysis system · DAC 1980
Electronic design automation › hardware verification and test
hardware verification
0.011980
An integrated mask artwork analysis system · DAC 1980
Electronic design automation › hardware verification and test
logic simulation
0.011980
An integrated mask artwork analysis system · DAC 1980

Methods — techniques the papers use, named apart from their topics

design rule checking · 0.0circuit parameter extraction · 0.0
YearPublicationVenuePosition
1994 A 5.6 kb/s speech codec using a pulse codebook and improved Viterbi decoding
abstract
A low bit-rate speech codec has been developed. The speech coder employs a PCELP (CELP with pulse codebook) algorithm, which uses a pulse-train excitation codebook to enhance the quality of voiced speech. The computational complexity for the pulse codebook search is greatly reduced by using truncated impulse responses of a weighted synthesis filter. An improved Viterbi decoding method using error detecting code information instead of tail bits has also been developed to increase the effective error-correction coding rate. A 5.6 kb/s speech codec has been implemented by incorporating the PCELP speech coding algorithm with the improved Viterbi decoding. Formal listening tests show that the synthetic speech quality of this codec is equivalent to that of 5.4-bit /spl mu/-law PCM in the absence of channel errors.>
Yoshiaki Asakawa, Hidetoshi Sekine, Makoto Takashima, Nobuyoshi Ishikawa, Toshiyuki Matsuda, Tom Okamoto, Ryujiro Muramatsu
ICASSP (1)3
1988 A Circuit Comparison System with Rule-Based Functional Isomorphism Checking
Makoto Takashima, Atsuhiko Ikeuchi, Shoichi Kojima, Toshikazu Tanaka, Tamaki Saitou, Jun-ichi Sakata
DAC1
1982 Programs for verifying circuit connectivity of mos/lsi mask artwork
Makoto Takashima, Takashi Mitsuhashi, Toshiaki Chiba, Kenji Yoshida
DAC1
1980 An integrated mask artwork analysis system
abstract
A new LSI artwork analysis and processing system, called EMAP, is described with algorithms, a database schema and applications. EMAP provides the designer with the artwork verification and processing tools which include mask artwork processing, geometrical design rule checking, connectivity analysis and electrical circuit parameter calculation. The circuit connectivity data derived from the mask artwork data is used for input to a logic simulator, a timing simulator, a circuit simulator and a circuit schematic generator.
Takashi Mitsuhashi, Toshiaki Chiba, Makoto Takashima, Kenji Yoshida
DAC3