Demo Data from SIGIR 2026 / reviewers in the wild / expert
Jim Vinson
dblp:54/8529
· DBLP profile ↗
2ranked-venue papers
2as first author
0since 2021 · last 2000
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Applied, interdisciplinary, general and emerging computing · 2 · 2 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
2 papers |
Hardware reliability and fault tolerance · 91% Integrated circuit design · 9% |
Topics — the 2 heaviest of 4, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Hardware reliability and fault tolerance › device reliability
electrostatic discharge |
0.0 | 2 | 2000 | Electrostatic discharge in semiconductor devices: protection techniques · Proc. IEEE 2000 Electrostatic discharge in semiconductor devices: an overview · Proc. IEEE 1998 |
Hardware reliability and fault tolerance › integrated circuit reliability
ESD protection |
0.0 | 1 | 2000 | Electrostatic discharge in semiconductor devices: protection techniques · Proc. IEEE 2000 |
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2000 | Electrostatic discharge in semiconductor devices: protection techniquesabstractElectrostatic discharges (ESDs) are everywhere-in our homes and businesses. Even the manufacturers of the electronics experience ESD failures in their factories. Electronic devices are sensitive to ESD. ESD results in failure of our computers, calculators, and car phones. There are ways to protect these sensitive components. This paper looks at ESD protection from a two-pronged approach: reducing the likelihood of having an ESD event and improving the robustness of the devices themselves. The first approach focuses on reducing the amount of charge that is developed and controlling the redistribution of any charges that are developed The second approach reviews ways to improve the circuit robustness by improving individual circuit elements and by adding additional elements for charge flow control and voltage clamping. Jim Vinson, Juin J. Liou |
Proc. IEEE | 1 |
| 1998 | Electrostatic discharge in semiconductor devices: an overviewabstractElectrostatic discharge (ESD) is an event that sends current through an integrated circuit (IC). This paper reviews the impact of ESD on the IC industry and details the four stages of an ESD event: (1) charge generation, (2) charge transfer, (3) device response, and (4) device failure. Topics reviewed are charge generation mechanisms, models for ESD charge transfer, electrical conduction mechanisms, and device damage mechanisms leading to circuit failure. Jim Vinson, Juin J. Liou |
Proc. IEEE | 1 |