To ensure reliability and service availability, next-generation networks are expected to rely on automated anomaly detection systems powered by advanced machine learning methods with the capability of handling multi-dimensional data. Such multi-dimensional, heterogeneous data occurs mostly in today’s Industrial Internet of Things (IIoT), where real-time detection of anomalies is critical to prevent impending failures and resolve them in a timely manner. However, existing anomaly detection methods often fall short of effectively coping with the complexity and dynamism of multi-dimensional data streams in IIoT. In this paper, we propose an adaptive method for detecting anomalies in IIoT streaming data utilizing a multi-source prediction model and concept drift adaptation. The proposed anomaly detection algorithm merges a prediction model into a novel drift adaptation method resulting in accurate and efficient anomaly detection that exhibits improved scalability. Our trace-driven evaluations indicate that the proposed method outperforms the state-of-the-art anomaly detection methods by achieving up to an 89.71% accuracy (in terms of Area under the Curve (AUC)) while meeting the given efficiency and scalability requirements.

The growth of streaming data originating from Internet of Things (IoT)-based Industry 4.0 opens doors to real-time analytics of time-sensitive services. However, this ever-increasing amount of data inevitably leads to anomalies, resulting in considerable risks for time-sensitive applications. Thus, real-time detection of anomalies is critical to prevent impending failures and resolve them in time. Given that the problem is to detect application-level anomalies in real time, we develop a deep learning-based technique, which integrates time-series data inference with a Long-Short Term Memory (LSTM)-based prediction model. Our proposed method relies on a novel metric called Sequence Inconsistency Distance (SID), which determines the abnormality likelihood of a target record in real time. Our trace-driven evaluations indicate that the proposed method achieves up to a 92.6% performance gain compared to the current state-of-the-art anomaly detection methods in terms of true positive and false positive rate while meeting the essential efficiency requirements.

The Industrial Internet of Things (IIoT) applications is usually associated with stringent latency requirements. An anomaly in an IIoT edge network deteriorates the performance and thus needs a real-time Root Cause Analysis (RCA) to identify the anomalous node and provide robust network infrastructure. In this paper, we present an automated, real-time RCA technique to identify the network-level root cause nodes. We use a deep learning-based approach, exploiting a Graph Neural Network (GNN) to identify root cause nodes. In GNN-RCA, we used a sampling technique and optimized aggregator function to reduce detection time. We have shown that the proposed GNNRCA method outperforms the existing benchmarks in terms of classification score and execution time.

Traditional power reduction techniques such as DVFS or RAPL are challenging to use with web services because they significantly affect the services’ latency and throughput. Previous work suggested the use of controllers based on control theory or machine learning to reduce performance degradation under constrained power. However, generating these controllers is challenging as every web service applications running in a data center requires a power-performance model and a fine-tuned controller. In this paper, we present DDPC, a system for autonomic data-driven controller generation for power-latency management. DDPC automates the process of designing and deploying controllers for dynamic power allocation to manage the power-performance trade-offs for latency-sensitive web applications such as a social network. For each application, DDPC uses system identification techniques to learn an adaptive power-performance model that captures the application’s power-latency trade-offs which is then used to generate and deploy a Proportional-Integral (PI) power controller with gain-scheduling to dynamically manage the power allocation to the server running application using RAPL. We evaluate DDPC with two realistic latency-sensitive web applications under varying load scenarios. Our results show that DDPC is capable of autonomically generating and deploying controllers within a few minutes reducing the active power allocation of a web-server by more than 50% compared to state-of-the-art techniques while maintaining the latency well below the target of the application.

Despite the creativity of the scientific community and the funding agencies, the underlying model of computation behind IoT, WSN, cloud, edge, fog, and mist is fundamentally the same; Computational nodes which are dynamically interconnected to form a system in where both processing capacity and connectivity may vary over time. On top of such a system, we consider applications that need packets to flow along a path and adhere to end-to-end deadlines. This application model is motivated by both control and automation systems, as well as telecom systems. The challenge is to guarantee end-to-end deadlines when allowing nodes and applications to join or leave. The mainstream, and to some extent natural, approach to this is to relax the stringency of the constraint (e.g. use probabilistic guarantees, soft deadlines). In this paper we take a different approach and keep the end-to-end deadlines as hard constraints and instead partially limit the freedom of how nodes and applications are allowed to leave and join. We present a theoretical framework for modeling such systems along with proofs that deadlines are always honored.

To remain competitive in the field of manufacturing today, companies must constantly improve the automation loops within their production plants. This can be done by augmenting the automation applications with "smart services" such as supervisory-control applications or machine-learning inference algorithms. The downside is that these smart services are often hosted in a cloud infrastructure and the automation applications require a low and predictable end-to-end latency. However, with the 5G technology it will become possible to establish a low-latency connection to the cloud infrastructure and with proper control of the capacity of the smart services, it will become possible to achieve a low and predictable end- to-end latency for the augmented automation applications. In this work we address the challenge of controlling the capacity of the smart services in a way that achieves a low and predictable end- to-end latency. We do this by deriving a mathematical framework that models a network of smart services that is hosting several automation applications. We pro- pose a generalized AutoSAC (automatic service- and admission controller) that builds on previous work by the authors. In the previous work the system was only capable of handling a single set of smart services, with a single application hosted on top of it. With the contributions of this paper it becomes possible to host multiple applications on top of a larger, more general network of smart services.

There is a strong industrial drive to use cloud computing technologies and concepts for providing timing sensitive services in the networking domain since it would provide the means to share the physical resources among multiple users and thus increase the elasticity and reduce the costs. In this work, we develop a mathematical model for user-stateless virtual network functions forming a forwarding graph. The model captures uncertainties of the performance of these virtual resources as well as the time-overhead needed to instantiate them. The model is used to derive a service controller for horizontal scaling of the virtual resources as well as an admission controller that guarantees that packets exiting the forwarding graph meet their end-to-end deadline. The Automatic Service and Admission Controller (AutoSAC) developed in this work uses feedback and feedforward making it robust against uncertainties of the underlying infrastructure. Also, it has a fast reaction time to changes in the input.

This paper presents a reconfigurable inner receiver for the LTE, DVB-H, and IEEE802.11n (WLAN) radio systems, all of which are based on orthogonal frequency division multiplexing (OFDM). The receiver is implemented in the CAL language. An FPGA-based hardware implementation is synthesized from RTL generated from the CAL description. The purpose of our work is to investigate the feasibility of dataflow methodology for high-level description of digital radio transceivers.

Firmware over the air (FOTA) is becoming a standard procedure for maintaining and updating wireless embedded systems. To cope with bandwidth and storage constraints this is facilitated using incremental updates based on delta technology, i.e. only the modifications are transmitted. The performance of a FOTA update is highly dependent on the size of the delta, and the type of modifications. Application of a delta update involves mutating the present version, byte by byte, into the new version. The problem is that even the smallest change in the source code may cause almost every single memory position to be affected, and thus requiring the complete memory to be rewritten. This has two implications: First, the time spent updating memory becomes unnecessary long. Secondly, and much worse, since a large part of the system is affected, the system is not functional during application.This paper introduces the concept of a feedback linker, which uses the object code layout of the previous version, when building a new version. The feedback linker maximizes the similarities between two versions allowing for smaller update packages and faster upgrades. The feedback linker is described in terms of an optimization procedure, an prototype test bed and a set of experimental results.

The paper presents a computational model for real-time control tasks, with the primary goal of simplifying the control and scheduling codesign problem. The model combines time-triggered I/O and inter-task communication with dynamic, reservation-based task scheduling. To facilitate short input-output latencies, a task may be divided into several segments. Jitter is reduced by allowing communication only at the beginning and at the end of a segment. A key property of the model is that both schedulability and control performance of a control task will depend on the reserved utilization factor only. This enables controllers to be treated as scalable real-time components. The model has been implemented in a real-time kernel and validated in a real-time control application.

Modern embedded computing systems tend to be heterogeneous in the sense of being composed of subsystems with very different characteristics, which communicate and interact in a variety of ways-synchronous or asynchronous, buffered or unbuffered, etc. Obviously, when designing such systems, a modeling language needs to reflect this heterogeneity. Today's modeling environments usually offer a variant of what we call amorphous heterogeneity to address this problem. This paper argues that modeling systems in this manner leads to unexpected and hard-to-analyze interactions between the communication mechanisms and proposes a more structured approach to heterogeneity, called hierarchical heterogeneity, to solve this problem. It proposes a model structure and semantic framework that support this form of heterogeneity, and discusses the issues arising from heterogeneous component interaction and the desire for component reuse. It introduces the notion of domain polymorphism as a way to address these issues.