A medium-access protocol called time-slot switching (TSS) is proposed for use in optical-fiber local area networks. This protocol incorporates features of time division, space division, and time compression for users to share a common medium. Very-large-integration (VLSI) CMOS electric crosspoints are used to switch traffic within individual time slots. With these features, data, voice, and video services can all be combined in a single network. In addition, the speed of the electronics can be maximized to match the available optical bandwidth. Operational principles of the TSS protocol are explained. A performance analysis is presented to show the tradeoffs among traffic capacity, frame guard time, blocking probability, and the results show that TSS is more attractive than broadcast protocols for voice traffic or constant-rate data traffic. An approach to integrating voice, data, and video traffic within TSS is also described.>

Sampled-data techniques are the most practical means of obtaining the necessary signal processing functions for timing recovery in the VLSI implementation of a digital subscriber loop transceiver. The sampled-data timing recovery techniques described in this paper are applicable to both echo cancellation and time-compression multiplexing systems. Timing recovery using baud-rate sampling in conjunction with a special pulse-shaping and timing function fulfills all the objectives for timing recovery in this application. It recovers a timing phase that has minimum precursor intersymbol interference, and makes possible the combination of decision feedback equalizer and echo canceler, reducing the convergence time and increasing the step size. The pulse-shaping function can be performed either in the transmitter by means of digital coding, or in the receiver by means of analog filtering. In the latter case, the transmitted pulse is compatible with more conventional approaches. The proposed partial-response line coding, a special form of AMI coding, is less susceptible to line impairments if detected as a two-level signal. Performance by analysis, simulation, and experimental measurements is reported on a variety of cable configurations, some including bridged taps. Analysis of jitter performance leads to design techniques for reducing the jitter magnitude.

Tradeoffs in the design of the timing recovery functions in a subscriber loop receiver are analyzed. The techniques considered are applicable to both the echo cancellation (EC) and time compression multiplexing (TCM) methods of full duplex transmission. Emphasis is on those techniques that lend themselves to implementation in MOSLSI technology, where the objective requirement is that timing recovery be implemented on a sampled-data signal (with the minimum possible sampling rate where EC is used). The wave difference method (WDM) for timing recovery appears to be the best candidate. A detailed study of its performance is carried out analytically and by computer simulation for the case of binary and alternate mark-inversion (AMI) line coding. A closed form expression describing the binary jitter performance of the WDM and its continuous time counterpart, the spectral line technique, is used to compare the two techniques. Analytical and simulation results for recovered phase and jitter are presented for various cable pulse responses carefully chosen to represent worst-case or nearly worst-case conditions. Two methods for including frequency detection in the WDM, the quadricorrelator and the rotational detector, are also simulated.

This paper reports on studies concerning the feasibility of large-scale integrated realization of the circuits needed to provide hybrid-mode full-duplex digital transmission at 80 kbits/s or higher rates over standard local telephone loops. Alternative means of achieving the required 60 dB or so of echo cancellation have been studied in detail. The conclusion is that a combination of analog and digital circuit techniques permit practical MOSLSI realization of the complete modem, including filters, echo canceller, timing recovery, and A/D and D/A converters, without need for external circuit elements, trimming, or adjustments. The preferred system configuration has been evaluated by means of analysis, simulation, and laboratory and field measurements. A complete full duplex system, including an experimental NMOS integrated circuit echo canceller, was built and tested. Measurements showed a bit error rate lower thanl0^{-8}with line attenuation up to 40 dB, operating at 80 kbits/s. We conclude that a fully integrated MOSLSI ciruit to implement all functions for a hybrid-mode digital local loop is entirely feasible.

This paper describes a new technique for implementing an echo canceller for full-duplex data transmission (such as in digital subscriber loops and volceband data sets). The canceller can operate in spite of time-invariant nonlinearities in the echo channel or in the implementation of the echo canceller itself (such as in the D/A converters). The basic structure of the linear echo canceller is not changed, but taps are simply added to account for the nonlinearity. The number of taps which must be added depends on the degree of nonlinearity which must be compensated. Numerical results based on computer simulation are given which show that typical nonlinearities encountered in MOS D/A converters can be compensated by a relatively small number of taps added to the linear echo canceller, and substantial improvement in the cancellation results.

Two implementations of an adaptive balancing hybrid are described. The first is predominly analog, in which the adaptation parameter θ is a continuous analog quantity, while the second is predominly digital, in which θ has a two-bit representation. Experimental results are reported.