Evidence from recent psycholinguistic experiments suggests that humans resolve reference incrementally in the presence of constraining visual context. In this paper, we present and evaluate a computational model of human reference resolution that directly builds a semantic interpretation of an utterance without the need for a separate syntactic analysis phase, which typically involves the construction of parse trees. The model is implemented on a robot using real audio and video inputs, (thus it operates in real time), and is distributed over several computers, which run in parallel. Results from experiments with the model confirm the viability of the algorithm to process semantic interpretations, in particular reference incrementally, as demonstrated to be employed by humans.

Behavior selection is typically a "built-in" feature of behavior-based architectures and hence, not amenable to change. There are, however, circumstances where changing behavior selection strategies is useful and can lead to better performance. In this paper, we demonstrate that such dynamic changes of behavior selection mechanisms are beneficial in several circumstances. We first categorize existing behavior selection mechanisms along three dimensions and then discuss seven possible circumstances where dynamically switching among them can be beneficial. Using the agent architecture framework activation, priority, observer, and component (APOC), we show how instances of all (nonempty) categories can be captured and how additional architectural mechanisms can be added to allow for dynamic switching among them. In particular, we propose a generic architecture for dynamic behavior selection, which can integrate existing behavior selection mechanisms in a unified way. Based on this generic architecture, we then verify that dynamic behavior selection is beneficial in the seven cases by defining architectures for simulated and robotic agents and performing experiments with them. The quantitative and qualitative analyzes of the results obtained from extensive simulation studies and experimental runs with robots verify the utility of the proposed mechanisms.

The trend in computer performance over the last 20 years has indicated that the memory performance constitutes a bottlneck for the overall system performance. As a result, smaller, faster memories have been introduced to hide the speed differential between the CPU and memory. From the beginning of this process, an essential question has been the determination of which part of main memory should reside in the faster memory at each instant. Several on-line and off-line algorithms have been introduced, the best known and most used of which are LRU and MIN respectively. This paper introduces a new approach to page replacement in that it allows the compiler to enter the decision process. In introducing compiler help to page replacement, information available at compile time is passed on to new hardware added to the regular memory, with the overall effect of markedly decreasing overall memory access time.