This paper presents a complete SystemC-based Wireless Sensor Network model. It implements the entire IEEE 802.15.4 standard, and permits to simulate scenarios at high level, taking hardware and software low level parameters into account, also enabling design space exploration for system level designers.

This paper describes a dynamically reconfigurable 8-function logic gate (CNT-DR8F) based on a double-gate carbon nanotube field effect transistor (DG-CNTFET). The design is based on a property specific to this device: ambivalence, enabling p-type or n-type behavior depending on the back-gate voltage. Using available models, CNT-DR8F is proposed, simulated and analyzed at 20 GHz operation. We also give an example functional block (full adder) to show how to construct logic circuits based on the association of physically identical reconfigurable logic cells.

Integrated optical interconnect has been identified by the ITRS as a potential solution to overcome predicted interconnect limitations in future systems-on-chip. However, the multiphysics nature of the design problem and the lack of a mature integrated photonic technology have contributed to severe difficulties in assessing its suitability. This paper describes a systematic, fully automated synthesis method for integrated microsource-based optical interconnect capable of optimally sizing the interface circuits based on system specifications, CMOS technology data, and optical device characteristics. The simulation-based nature of the design method means that its results are relatively accurate, even though the generation of each data point requires only 5 min on a 1.3-GHz processor. This method has been used to extract typical performance metrics (delay, power, interconnect density) for optical interconnect of length 2.5-20 mm in three predictive technologies at 65-, 45-, and 32-nm gate length.

In this paper, we present a tool to analyze photonic devices that can be used to realize basic building blocks of an optical network-on-chip (ONoC). Co-design between electrical tools and optical tools is possible. The VHDL-AMS language has been used to implement behavioral models of photonic devices. For low-level simulation, a gateway between an optical simulator, based on the finite elements method, and a typical EDA layout editor has been realized.

In this paper, we present a framework for the automated design of integrated multi-domain systems. The platform allows the designer to set optimization problems according to a hierarchical decomposition strategy, define complex specification functions for each block at a given hierarchical level, follow the progress of optimization and finally view results. Encapsulation of design methodologies is simplified through access to a library of optimization algorithms. The framework is demonstrated through the co-synthesis of a high-speed CMOS photoreceiver front-end comprised of a PIN photodiode and a transimpedance amplifier.

Internet success and ever-improving microprocessor performance have brought a need for new short range optical communications. The challenge is to integrate electronics, optoelectronic components and optical components on the same chip. Such assembly creates new constraints due to the interactions between different aspects (electronic, optical, thermal, mechanical) that designers have to deal with. Although specific tools have been used to design each module separately, there is no multi-domain simulator or design framework that can meet with such constraints. This paper describes how we can use VHDL-AMS to create a library of hierarchical models and to simulate optoelectronic devices and systems. These models can then be used to propagate specifications from the system down to the physical layer in a top-down approach and to predict the influence of physical parameters on the global performance in a bottom-up approach.