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Jinfeng Liu 0006

dblp:62/1684-6 · DBLP profile ↗
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8ranked-venue papers
5as first author
0since 2021 · last 2007
—ORCID · conflict

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 6 · 5 first-authorComputer networks · 2Applied, interdisciplinary, general and emerging computing · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer networks
2 papers
Internet of things and sensor networks · 100%
Computer architecture, parallel and distributed computing, and storage systems
2 papers
Embedded and real-time systems · 62% Energy-efficient computing · 38%
Human-computer interaction and pervasive computing
1 paper
Wearable and physiological sensing · 100%

Topics — the 8 heaviest of 9, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Internet of things and sensor networks
wireless sensor network
0.112006
Tapper: a lightweight scripting engine for highly constrained wireless sensor nodes · IPSN 2006
Internet of things and sensor networks › wireless sensor network › wireless sensor network platform
wireless sensor node programming
0.112006
Tapper: a lightweight scripting engine for highly constrained wireless sensor nodes · IPSN 2006
Internet of things and sensor networks › wireless sensor network
wireless sensor nodes
0.112005
Eco: an ultra-compact low-power wireless sensor node for real-time motion monitoring · IPSN 2005
Energy-efficient computing
energy-aware scheduling
0.012001
Power-Aware Scheduling under Timing Constraints for Mission-Critical Embedded Systems · DAC 2001
Energy-efficient computing
power management
0.012001
Power-Aware Scheduling under Timing Constraints for Mission-Critical Embedded Systems · DAC 2001
Embedded and real-time systems
real-time scheduling
0.012001
Power-Aware Scheduling under Timing Constraints for Mission-Critical Embedded Systems · DAC 2001
Wearable and physiological sensing › motion sensing
motion monitoring
0.012005
Eco: an ultra-compact low-power wireless sensor node for real-time motion monitoring · IPSN 2005
Embedded and real-time systems › critical systems
mission-critical systems
0.012001
Power-Aware Scheduling under Timing Constraints for Mission-Critical Embedded Systems · DAC 2001

Methods — techniques the papers use, named apart from their topics

dynamic reconfiguration · 0.1command interpretation · 0.1hardware-software co-design · 0.1timing constraint satisfaction · 0.0scheduling algorithm · 0.0
YearPublicationVenuePosition
2007 Idle energy minimization by mode sequence optimization
abstract
This article presents techniques for reducing idle energy by mode-sequence optimization (MSO) under timing constraints. Our component-level CoMSO algorithm computes energy-optimal mode-transition sequences for different lengths of idle intervals. Our system-level SyMSO algorithm shifts tasks within slack intervals while satisfying all timing and resource constraints in the given schedule. Experimental results on a commercial software-defined radio show that these new techniques can reduce idle energy by 50--70%, or 30--50% of total system energy over previous offline-optimal but unsequenced techniques based on localized break-even-time analysis, thanks to rich options offered by mode sequencing.
Jinfeng Liu 0006, Pai H. Chou
ACM Trans. Design Autom. Electr. Syst.1
2006 Tapper: a lightweight scripting engine for highly constrained wireless sensor nodes
abstract
Tapper is a lightweight scripting engine for highly constrained wireless sensor nodes. Many such nodes run on 8-bit microcontrollers (MCUs) with only a few kilobytes of on-chip memory, often with segmented memory and unorthogonal registers that make it difficult to perform even the most basic tasks. To facilitate development of software routines and enable dynamic reconfigurability, Tapper provides a software layer that can interpret human readable commands either interactively or in batch. It can invoke compiled routines ranging from timer and interrupt configurations and task scheduling to accessing I/O devices. Experiments on platforms including 8051, ATMega 169V, and Freescale MC9S12NE64 with built-in Ethernet show that the Tapper setup has the same modular, dynamic benefits as middleware systems but without the high overhead in code size and data memory.
Jinfeng Liu 0006, Pai H. Chou
IPSN2
2005 Eco: an ultra-compact low-power wireless sensor node for real-time motion monitoring
abstract
Eco is an ultra-compact wireless sensor node. Only 648 mm/sup 3/ in volume and weighing under 1.6 grams, Eco was initially designed to monitor the spontaneous motion of preterm infants over 2.4 GHz radio links at the maximum data rate of 1 Mbps. The compact form factor and low power consumption also make Eco nodes highly suitable for many other applications, including medicine, environmental monitoring, new computer-human interface, and ambient intelligence. This paper describes the hardware and software designs of the second generation Eco nodes and the host interface. We also present an evaluation and comparison against other popular sensor nodes in the similar class.
Chulsung Park, Jinfeng Liu 0006, Pai H. Chou
IPSN2
2004 Optimizing mode transition sequences in idle intervals for component-level and system-level energy minimization
abstract
New embedded systems offer rich power management features in the form of multiple operational and nonoperational power modes. While they offer mechanisms for better energy efficiency, they also complicate power management decisions in the presence of realtime constraints. A traditional dynamic power management techniques based on localized break-even-time analysis with simple on/off power controls often yield suboptimal if not incorrect results globally. To address these problems, This work presents two core algorithms for reducing idle energy consumption at the component level and system level. The first algorithm discovers the optimal sequence for mode transition over multiple power modes under timing constraints. It assists the second algorithm that performs a sophisticated global search strategy to aggressively explore system-wide energy savings by correctly interpreting the constraints across all subsystems. Experimental results show that in an embedded radio system where idle energy cost matches or exceeds the active energy consumption, our technique can further reduce the idle energy by 50-70%, which translates into 30-50% of overall system energy compared to existing techniques.
Jinfeng Liu 0006, Pai H. Chou
ICCAD1
2004 Distributed Embedded Systems for Low Power: A Case Study
abstract
Summary form only given. A multiple-processor system can potentially achieve higher energy savings than a single processor, because the reduced workload on each processor creates new opportunities for dynamic voltage scaling (DVS). However, as the cost of communication starts to match or surpass that of computation, many new challenges arise in making DVS effective in a distributed system under communication-intensive workload. We discuss implementation issues for supporting DVS on distributed embedded processors. We implemented and evaluated four distributed schemes: (1) DVS during I/O, (2) partitioning, (3) power-failure recovery, and (4) node rotation. We validated the results on a distributed embedded system with the Itsy pocket computers connected by serial links. Our experiments confirmed that a distributed system can create new DVS opportunities and achieve further energy savings. However, a surprising result was that aggregate energy savings do not translate directly into a longer battery life. In fact, the best partitioning scheme, which distributed the workload onto two nodes and enabled the most power-efficient CPU speeds at 30-50%, resulted in only 15% improvement in battery lifetime. Of the four techniques evaluated, node rotation showed the most measurable improvement to battery lifetime at 45% by balancing the discharge rates among the nodes.
Jinfeng Liu 0006, Pai H. Chou
IPDPS1
2003 Energy Optimization of Distributed Embedded Processors by Combined Data Compression and Functional Partitioning
abstract
Transmitting compressed data can reduce inter-processor communication traffic and create new opportunities for DVS (dynamic voltage scaling) in distributed embedded systems. However, data compression alone may not be effective unless coordinated with functional partitioning. This paper presents a dynamic programming technique that combines compression and functional partitioning to minimize energy on multiple voltage-scalable processors running pipelined data-regular applications under performance constraints. Our algorithm computes the optimal functional partitioning, CPU speed for each node, and their respective compression ratios. We validate the algorithm's effectiveness on a real distributed embedded system running an image processing algorithm.
Jinfeng Liu 0006, Pai H. Chou
ICCAD1
2003 B#: a battery emulator and power profiling instrument
abstract
This paper describes B# (B-sharp), a programmable power supply that emulates the behavior of a battery. It measures the current load, calls a battery simulation program to compute the voltage in real time, and controls a linear regulator to mimic the voltage output of a battery. This instrument enables validation of battery-aware power-optimization techniques with accurate, controllable, reproducible results. This instrument also supports training mode with actual batteries, and it can even be used for recording and playback of a solar power source. This design has been prototyped and tested on hand-held devices with high accuracy and fast response time.
Pai H. Chou, Chulsung Park, Jae Park, Jinfeng Liu 0006
ISLPED5
2001 Power-Aware Scheduling under Timing Constraints for Mission-Critical Embedded Systems
abstract
Power-aware systems are those that must make the best use of available power. They subsume traditional low-power systems in that they must not only minimize power when the budget is low, but also deliver high performance when required. This paper presents a new scheduling technique for supporting the design and evaluation of a class of power-aware systems in mission-critical applications. It satisfies stringent min/max timing and max power constraints. It also makes the best effort to satisfy the min power constraint in an attempt to fully utilize free power or to control power jitter. Experimental results show that our scheduler can improve performance and reduce energy cost simultaneously compared to hand-crafted designs for previous missions. This tool forms the basis of the IM-PACCT system-level framework that will enable designers to explore many power-performance trade-offs with confidence. 1.
Jinfeng Liu 0006, Pai H. Chou, Nader Bagherzadeh, Fadi J. Kurdahi
DAC1