Demo Data from SIGIR 2026 / reviewers in the wild / expert
Susan Lippincott Mack
dblp:62/4686
· DBLP profile ↗
1ranked-venue papers
0as first author
0since 2021 · last 2005
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Electronic design automation · 77% Integrated circuit design · 23% |
Topics — the 2 heaviest of 2, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Electronic design automation
design for manufacturability |
0.1 | 1 | 2005 | DFM rules! · DAC 2005 |
Integrated circuit design
nanometer technology |
0.0 | 1 | 2005 | DFM rules! · DAC 2005 |
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2005 | DFM rules!abstractFor sub-100nm processes, predictions are putting initial process yields in the single digits. At the same time, at 130nm, we saw that two chips designed with the same methodology and same design rules could deliver completely different manufacturing yields.This panel will discuss the reasons for these phenomena and talk about future trends in DFM that will need to be addressed for success below 100nm. Naveed A. Sherwani, Susan Lippincott Mack, Alex Alexanian, Premal Buch, Carlo Guardiani, Harold Lehon, Peter Rabkin, Atul Sharan |
DAC | 2 |