Demo Data from SIGIR 2026 / reviewers in the wild / expert
Claire Fang Fang
dblp:65/2303
· DBLP profile ↗
7ranked-venue papers
4as first author
0since 2021 · last 2008
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 5 · 2 first-authorGraphics, computer vision, multimedia, augmented reality and games · 2 · 2 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
3 papers |
Electronic design automation · 96% Integrated circuit design · 4% |
Topics — the 5 heaviest of 6, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Electronic design automation
design optimization |
0.1 | 1 | 2008 | Probabilistic Interval-Valued Computation: Toward a Practical Surrogate for Statistics Inside CAD Tools · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2008 |
Electronic design automation › timing analysis
statistical timing analysis |
0.1 | 1 | 2008 | Probabilistic Interval-Valued Computation: Toward a Practical Surrogate for Statistics Inside CAD Tools · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2008 |
Electronic design automation › timing analysis
statistical timing and variation analysis |
0.1 | 1 | 2006 | Probabilistic interval-valued computation: toward a practical surrogate for statistics inside CAD tools · DAC 2006 |
Electronic design automation › hardware verification and test
static analysis |
0.0 | 1 | 2003 | Toward efficient static analysis of finite-precision effects in DSP applications via affine arithmetic modeling · DAC 2003 |
Integrated circuit design
digital signal processing circuits |
0.0 | 1 | 2003 | Toward efficient static analysis of finite-precision effects in DSP applications via affine arithmetic modeling · DAC 2003 |
Methods — techniques the papers use, named apart from their topics
affine arithmetic · 0.2monte carlo simulation · 0.1probabilistic intervals · 0.1interval algebra · 0.1interval analysis · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2008 | Probabilistic Interval-Valued Computation: Toward a Practical Surrogate for Statistics Inside CAD ToolsabstractInterval methods offer a general fine-grain strategy for modeling correlated range uncertainties in numerical algorithms. We present a new improved interval algebra that extends the classical affine form to a more rigorous statistical foundation. Range uncertainties now take the form of confidence intervals. In place of pessimistic interval bounds, we minimize the probability of numerical "escape"; this can tighten interval bounds by an order of magnitude while yielding 10-100 times speedups over Monte Carlo. The formulation relies on the following three critical ideas: liberating the affine model from the assumption of symmetric intervals; a unifying optimization formulation; and a concrete probabilistic model. We refer to these as probabilistic intervals for brevity. Our goal is to understand where we might use these as a surrogate for expensive explicit statistical computations. Results from sparse matrices and graph delay algorithms demonstrate the utility of the approach and the remaining challenges. Amith Singhee, Claire Fang Fang, James D. Ma, Rob A. Rutenbar |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. | 2 |
| 2006 | Probabilistic interval-valued computation: toward a practical surrogate for statistics inside CAD toolsabstractInterval methods offer a general, fine-grain strategy for modeling correlated range uncertainties in numerical algorithms. We present a new, improved interval algebra that extends the classical affine form to a more rigorous statistical foundation. Range uncertainties now take the form of confidence intervals. In place of pessimistic interval bounds, we minimize the probability of numerical "escape"; this can tighten interval bounds by 10X, while yielding 10-100X speedups over Monte Carlo. The formulation relies on three critical ideas: liberating the affine model from the assumption of symmetric intervals; a unifying optimization formulation; and a concrete probabilistic model. We refer to these as probabilistic intervals, for brevity. Our goal is to understand where we might use these as a surrogate for expensive, explicit statistical computations. Results from sparse matrices and graph delay algorithms demonstrate the utility of the approach, and the remaining challenges. Amith Singhee, Claire Fang Fang, James D. Ma, Rob A. Rutenbar |
DAC | 2 |
| 2005 | Interval-valued statistical modeling of oxide chemical-mechanical polishingabstractTechnology-oriented tools provide the raw data needed to optimize the fabrication process itself, and to predict problematic variational impacts on silicon design. Unfortunately, even in these physics-oriented tools, statistically uncertain quantities appear as crucial inputs. To date, Monte Carlo techniques have been the dominant solution method. We suggest an alternative in which uncertainties are represented as correlated intervals, and interval-valued computations replace the standard scalar operations in the numerical algorithm for the tool. We use an oxide chemical-mechanical polishing tool as an example, and show how to "retrofit" workable statistical models on top of the original algorithm. Accuracies to within /spl sim/1-10% of Monte Carlo simulation, and speedups of /spl sim/10-100X can be achieved, depending on whether we choose a formulation which emphasizes accuracy, or efficiency. James D. Ma, Claire Fang Fang, Rob A. Rutenbar, Xiaolin Xie, Duane S. Boning |
ICCAD | 2 |
| 2003 | Toward efficient static analysis of finite-precision effects in DSP applications via affine arithmetic modelingabstractWe introduce a static error analysis technique, based on smart interval methods from affine arithmetic, to help designers translate DSP codes from full-precision floating-point to smaller finite-precision formats. The technique gives results for numerical error estimation comparable to detailed simulation, but achieves speedups of three orders of magnitude by avoiding actual bit-level simulation. We show results for experiments mapping common DSP transform algorithms to implementations using small custom floating point formats. Claire Fang Fang, Rob A. Rutenbar, Markus Püschel, Tsuhan Chen |
DAC | 1 |
| 2003 | Floating-point error analysis based on affine arithmeticabstractDuring the development of floating-point signal processing systems, an efficient error analysis method is needed to guarantee the output quality. We present a novel approach to floating-point error bound analysis based on affine arithmetic. The proposed method not only provides a tighter bound than the conventional approach, but also is applicable to any arithmetic operation. The error estimation accuracy is evaluated across several different applications which cover linear operations, nonlinear operations, and feedback systems. The accuracy decreases with the depth of computation path and also is affected by the linearity of the floating-point operations. Claire Fang Fang, Tsuhan Chen, Rob A. Rutenbar |
ICASSP (2) | 1 |
| 2003 | Fast, Accurate Static Analysis for Fixed-Point Finite-Precision Effects in DSP Designs
Claire Fang Fang, Rob A. Rutenbar, Tsuhan Chen |
ICCAD | 1 |
| 2002 | Floating-point bit-width optimization for low-power signal processing applicationsabstractTo enable floating-point (FP) signal processing applications in low-power mobile devices, we propose a lightweight FP design flow that can optimize the bit-width configuration. The optimization considers both the hardware cost and the numerical precision. Variable grouping is used to reduce the complexity of optimization by connecting software description and hardware implementation. The optimization algorithm is able to avoid local optima, and multiple-phase optimization helps to reduce the cost further. We apply the proposed design flow to the design of inverse discrete cosine transform (IDCT), and show that the power consumption of our lightweight FP IDCT is comparable to an optimized fixed-point design. In addition, promising results on some real-world applications such as video coding and speech recognition demonstrate that lightweight FP signal processing will find more and more applications in low-power devices. Claire Fang Fang, Tsuhan Chen, Rob A. Rutenbar |
ICASSP | 1 |