Demo Data from SIGIR 2026 / reviewers in the wild / expert
Lynn Choi
dblp:65/4954
· DBLP profile ↗
25ranked-venue papers
9as first author
2since 2021 · last 2025
—ORCID · conflict
Domains — the database's venue-derived domains; a paper can count in several
Computer networks · 11 · 3 first-authorSystems, architecture and hardware · 8 · 5 first-authorArtificial intelligence and machine learning · 1 · 1 first-author · 1 since 2021Software engineering, systems software and programming languages · 1 · 1 first-authorApplied, interdisciplinary, general and emerging computing · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
4 papers |
Memory systems · 85% Parallel and multicore computing · 15% | |
| Computer networks
1 paper |
Internet architecture and protocols · 100% | |
| Software engineering, system software, and programming languages
3 papers |
Compilers and program optimization · 68% Program analysis · 32% |
Topics — the 10 heaviest of 11, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Internet architecture and protocols › packet processing
packet classification |
0.1 | 1 | 2009 | Scalable packet classification through rulebase partitioning using the maximum entropy hashing · IEEE/ACM Trans. Netw. 2009 |
Memory systems
cache coherence |
0.1 | 4 | 2000 | Compiler Analysis for Cache Coherence: Interprocedural Array Data-Flow Analysis and Its Impact on Cache Performance · IEEE Trans. Parallel Distributed Syst. 2000 Hardware and Compiler-Directed Cache Coherence in Large-Scale Multiprocessors: Design Considerations and Performance Study · IEEE Trans. Parallel Distributed Syst. 2000 Compiler and Hardware Support for Cache Coherence in Large-Scale Multiprocessors: Design Considerations and Performance Study · ISCA 1996 |
Memory systems › cache coherence › software cache coherence
compiler-directed cache coherence |
0.1 | 3 | 2000 | Hardware and Compiler-Directed Cache Coherence in Large-Scale Multiprocessors: Design Considerations and Performance Study · IEEE Trans. Parallel Distributed Syst. 2000 Compiler and Hardware Support for Cache Coherence in Large-Scale Multiprocessors: Design Considerations and Performance Study · ISCA 1996 A compiler-directed cache coherence scheme with improved intertask locality · SC 1994 |
Compilers and program optimization › compiler analysis
array data-flow analysis |
0.1 | 2 | 2000 | Compiler Analysis for Cache Coherence: Interprocedural Array Data-Flow Analysis and Its Impact on Cache Performance · IEEE Trans. Parallel Distributed Syst. 2000 Hardware and Compiler-Directed Cache Coherence in Large-Scale Multiprocessors: Design Considerations and Performance Study · IEEE Trans. Parallel Distributed Syst. 2000 |
Internet architecture and protocols › packet processing
scalable forwarding |
0.0 | 1 | 2009 | Scalable packet classification through rulebase partitioning using the maximum entropy hashing · IEEE/ACM Trans. Netw. 2009 |
Program analysis › static analysis
interprocedural analysis |
0.0 | 1 | 2000 | Compiler Analysis for Cache Coherence: Interprocedural Array Data-Flow Analysis and Its Impact on Cache Performance · IEEE Trans. Parallel Distributed Syst. 2000 |
Compilers and program optimization
parallelizing compiler |
0.0 | 1 | 2000 | Hardware and Compiler-Directed Cache Coherence in Large-Scale Multiprocessors: Design Considerations and Performance Study · IEEE Trans. Parallel Distributed Syst. 2000 |
Parallel and multicore computing › multiprocessor system
shared-memory multiprocessor |
0.0 | 2 | 2000 | Compiler Analysis for Cache Coherence: Interprocedural Array Data-Flow Analysis and Its Impact on Cache Performance · IEEE Trans. Parallel Distributed Syst. 2000 Compiler and Hardware Support for Cache Coherence in Large-Scale Multiprocessors: Design Considerations and Performance Study · ISCA 1996 |
Program analysis
data flow analysis |
0.0 | 1 | 1994 | A compiler-directed cache coherence scheme with improved intertask locality · SC 1994 |
Parallel and multicore computing › multiprocessor system
large-scale multiprocessor |
0.0 | 1 | 2000 | Hardware and Compiler-Directed Cache Coherence in Large-Scale Multiprocessors: Design Considerations and Performance Study · IEEE Trans. Parallel Distributed Syst. 2000 |
Methods — techniques the papers use, named apart from their topics
maximum entropy hashing · 0.1simulation · 0.1execution-driven simulation · 0.1version control · 0.0epoch counter · 0.0array data-flow analysis · 0.0dataflow analysis · 0.0data flow analysis · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2025 | Scalable and Stable WiFi Localization (SSWLoc): Through on-Demand Map Extraction and Adaptive Similarity Weighting Based on Signal StrengthabstractWi-Fi indoor positioning systems (IPS) often face stability and scalability problems with traditional mapping algorithms such as K-nearest neighbors and cosine similarity. These methods rely on vector maps, leading to high processing overhead and scalability challenges in large testbeds owing to the sparse vector. Additionally, these algorithms fail to consider signal strength and physical coordinates, causing long-term stability problems. These problems can lead to performance degradation during the long-term deployment of Wi-Fi IPS. To address scalability, we dynamically extracted local map data from raw radio frequency (RF) maps using scanned service set identifiers (SSIDs). For stability, we propose an adaptive weighted sum similarity mapping algorithm that uses a scaling factor per received signal strength (RSS). We deployed our Wi-Fi IPS in a 219,200 m2COEX mall, a major indoor complex in South Korea. While the traditional vector map required 200.42 MB of data, our method only needed 41.62 KB, reducing the load size by 99.98%. In five test scenarios, traditional algorithms had average errors of 7.14 m and 8.02 m, whereas our algorithm reduced the error to 2.78 m. After six months, traditional methods' errors increased to 16.04 m and 17.11 m, but our method maintained an average error of 5.92 m. Minhyeok Choi, Lynn Choi |
CCNC | 2 |
| 2025 | MW-MAS: A Multi-agent System for Multimodal Watermarking with Agent Orchestration
Lynn Choi, Min Su Park, Taeeun Kim, Eunil Park |
PRIMA | 1 |
| 2020 | Magnetic Vector Calibration for Real-Time Indoor PositioningabstractGeomagnetic signals are attractive media for indoor localization since they have less noise than RF and don't require additional equipment installation for signal generation. The fingerprinting technique used in geomagnetic field based indoor positioning systems (IPS) estimates the position by matching the magnetic vector sampled from the current location with the magnetic vectors recorded in the magnetic field map. However, since the magnetic field is represented by a 3-dimensional vector, the values of a magnetic vector may change depending on the user's orientation or the grip position. Thus, the sampled magnetic vector may have different values from the vector values stored in the magnetic field map depending on the sensor's orientation. This may substantially lower the positioning accuracy. To avoid this problem, the existing studies use only the magnitude of a magnetic vector, but this reduces the uniqueness of the fingerprint, which may also degrade the positioning accuracy. In this paper we propose a vector calibration algorithm which can adjust the sampled magnetic vector to the vector of the magnetic field map by using the parametric equation of a circle. This can minimize mismatching with the magnetic field map. To implement this, we need to compute the relative rotation angle from the moving direction of the current user to the moving direction during the field map collection. Since we can measure the moving direction by using the gyroscope and accelerometer, we can compute this relative rotation angle dynamically. To evaluate our vector calibration algorithm, we compare the value mismatches with and without vector calibration for 6 random-walk paths in our campus testbed of 2470 square meters. Our results show that with the calibration, we can decrease the difference between the sampled magnetic vector and the magnetic field map vectors from 17.61$\mu$T to 2.38 $\mu$T in x dimension, from 17.24$\mu$T to 2.59 $\mu$T in y dimension, and from 6.86 $\mu$T to 2.16 $\mu$T in z dimension on average. This translates to 83% reduction in the map mismatch compared to the numbers without calibration. In addition, we also demonstrate the effectiveness of the calibration by applying the algorithm to our long short-term memory (LSTM)-based IPS. Wonjoon Son, Lynn Choi |
ICC | 2 |
| 2020 | Filter cache: filtering useless cache blocks for a small but efficient shared last-level cache
Han Jun Bae, Lynn Choi |
J. Supercomput. | 2 |
| 2019 | Large-Scale Indoor Positioning using Geomagnetic Field with Deep Neural NetworksabstractThe existing RF signal based indoor localization techniques such as BLE or Wi-Fi fingerprinting are hard to apply to large scale indoor environment such as airport and department stores since the localization error grows as the physical dimension of the indoor space increases. This can be attributed to unstable received signal strengths (RSS) of the underlying RF signal, which is enlarged with the increased physical scale and the complexity of the indoor space. In this paper, instead of RF signal we use the geomagnetic sensor signal for indoor localization, whose signal strength is more stable than RF RSS. Our approach using the geomagnetic field is as follows. Although similar geomagnetic field values exist in indoor space, an object movement would experience a unique sequence of the geomagnetic field signals as the movement continues. We can locate the position of the object by tracking the geomagnetic field signal sequence sensed with the object movement by using a deep neural network model called recurrent neural network (RNN), which is good at recognizing time varying sequence of sensor data. We use two different versions of RNN model: basic RNN and Long Short-Term Memory (LSTM). We have trained RNNs to learn the magnetic field maps of both medium scale (about 94m x 26m) and large scale (about 608m x 50m area) indoor testbeds and analyze both training and test set results by tuning several training hyperparameters. For comparison, we have also implemented both Bluetooth Low Energy (BLE) and Wi-Fi based fingerprinting localization techniques and measured their localization accuracies for the testbeds. By using Google TensorFlow 1.6 and Nvdia CUDA Toolkit v9.0 with cuDNN v7.1 library as a deep learning framework, we could achieve the average localization accuracy of 0.51 and 1.04 meters for the medium and the large-scale testbeds respectively with LSTM model, substantially improving the localization performance compared to the existing RF based fingerprinting techniques. Han Jun Bae, Lynn Choi |
ICC | 2 |
| 2019 | Environment Aware Localization with BLE Fingerprinting for the Next Generation PEPS systemabstractTraditional Passive Entry and Passive Start (PEPS) systems use a physical key fob, LF transmitters, and UHF communication to control a vehicle's door and engine. The car's Electronic Control Unit (ECU) can unlock the door or trunk, and it can also start the engine depending on the key fob's positions and the command received from the key. In this paper, we use smartphone with Bluetooth Low Energy (BLE) beacons to implement the next-generation PEPS system, replacing the LF/UHF technology and the physical key fob used in the existing PEPS system. With BLE fingerprinting, we can estimate the position of a smartphone by comparing BLE signal strengths of the current location with pre-recorded signal strengths of reference points. However, unlike the existing indoor localization, BLE-based PEPS systems need to consider the impact of changing environment due to the mobility of a vehicle since BLE signal strength is highly affected by surrounding environment such as neighboring cars and walls. If pre-recorded environment and the actual environment are different, localization accuracy can be greatly reduced. To address this issue we propose a new BLE-based localization scheme that can estimate the surrounding environment of the vehicle through beacons and scanners attached to the vehicle. We have evaluated our proposed BLE-based PEPS system by using Hyundai LF Sonata as a test vehicle. For comparative evaluation, we also test BLE ranging model, which determines the smartphone position depending on the strength and the type of detected beacons. In an open space testbed with no neighboring vehicles, the ranging model produces 90.1% positioning accuracy on average. In contrast, the proposed BLE-fingerprinting model achieves 94.6% accuracy on average without dark areas. In addition, in the same testbed with neighboring vehicles, the proposed BLE-fingerprinting PEPS system achieves 90.5% accuracy on average with environment adaptation while only 62% accuracy without environmental knowledge. Han Jun Bae, Lynn Choi |
WCNC | 2 |
| 2019 | Dynamic directory table with victim cache: on-demand allocation of directory entries for active shared cache blocks
Han Jun Bae, Lynn Choi |
J. Supercomput. | 2 |
| 2017 | Geomagnetic Field Based Indoor Localization Using Recurrent Neural NetworksabstractThe time-varying, unstable nature of RF signals has limited the accuracy of RF-based indoor positioning techniques such as Wi-Fi fingerprinting. Positioning errors of over 10 meters are reported in large-scale indoor environment such as airport and department stores. Compared to RF or ultrasound signals, the geomagnetic field signal exhibits stable signal strength in time domain. However, the existing geomagnetic field based indoor localization still relies on the fingerprinting technique, which is borrowed from the RF-based indoor positioning. This cannot resolve the distribution of the same geomagnetic field values and thus became a major reason for diminished performance of geomagnetic- based indoor localization. In this paper, we propose a novel indoor localization technique that uses magnetometer sensor readings as input to the artificial neural network models. The idea is that although there can be multiple locations having the same magnetic field value, as a pedestrian moves the sequence of magnetic field values will lead to a unique pattern of the sensor readings over time. We use a recurrent neural network (RNN) since it can characterize a particular location based on the current input as well as the past sequence of inputs. We first build a geomagnetic field map on our campus test-bed. Then, we generate a million traces of various pedestrian walking patterns from the map. We use Google Tensorflow with NVIDIA cuDNN library as a Deep Learning framework. 95% of the traces are used for training and 5% of the traces are used for localization evaluation. In this preliminary evaluation, we show an average positioning error of 1.062 meters compared to the average error of 3.14 meters of our BLE fingerprinting results. We cannot only improve the localization accuracy but we are also able to address the problem of continuous route tracking, which was not possible with the RF-based fingerprinting. Ho Jun Jang, Jae Min Shin, Lynn Choi |
GLOBECOM | 3 |
| 2016 | WACA: WearAble Device Based Home Control Assistant Framework
Bonhyun Koo, Simon Kong, Hyejung Cho, Lynn Choi |
ICCSA (2) | 4 |
| 2016 | Inverse fingerprinting: Server side indoor localization with Bluetooth low energyabstractSince the adoption of Bluetooth Low Energy (BLE) in the Bluetooth standard in 2010, BLE beacons are emerging as one of the most viable solutions for indoor localization due to its power efficient architecture, short scan duration, low cost chipset, and wide adoption in the devices. The existing indoor positioning systems based on BLE beacons employ the classical fingerprinting technique where user terminals collect signals from the beacons and do most of localization computations, requiring significant power consumption on user devices. However, constant power consumption on limited battery life of a mobile device can be problematic when it comes to supporting server-oriented tracking applications. In this paper, we propose and implement a new way of fingerprinting technique called inverse fingerprinting (Inv-FP), which is a server side BLE fingerprint system where most of the positioning computations are done by BLE sniffers and servers. We analyze various characteristics of Inv-FP in comparison with the classical beacon based fingerprinting system (FP), and demonstrate that Inv-FP can match the performance of FP but with minimal power consumption on user devices. Jae Hyung An, Lynn Choi |
PIMRC | 2 |
| 2015 | SPEED-MAC: speedy and energy efficient data delivery MAC protocol for real-time sensor network applications
Lynn Choi |
Wirel. Networks | 2 |
| 2013 | Influenza surveillance and forecast with smartphone sensorsabstractIn this paper we introduce an influenza surveillance and forecast system that can track the proliferation of influenza and predict potential infections by analyzing smartphone sensor readings. While previous studies focus on the social connectivity to deduce proliferation paths, we investigate physical contacts and their surrounding features including the staying time of these contacts, the human density and the openness of the space, and the infection status of each individual. By using a smartphone equipped with various sensors we can estimate the infection status of its owner as well as the surrounding features based on the analysis of the envelope of incoming sound and the mobility history of the owner. A surveillance server, which aggregates the information from multiple smartphones, monitors the infection status of influenza and ranks both the high risk persons and the influential persons that have to be vaccinated promptly. To evaluate the performance of our system we model the proliferation of influenza by applying both an influenza infection model and a community mobility model to mobile agents in NS-2 simulator. The simulation results show that the forecast accuracy of our system is 90.2% while the accuracy of forecast based on the social connectivity alone is 75.3%. By using the proliferation forecast our system can reveal influential persons, reducing 33.5% of infections by vaccinating only 6% of the entire group. Yunmook Nah, Lynn Choi |
ISORC | 3 |
| 2012 | The design of a ultra-low power RF wakeup sensor for wireless sensor networksabstractConventional MAC protocols for wireless sensor networks have adopted duty cycling to reduce idle listening, but duty cycling leads to energy-latency tradeoff, which is one of the major challenges for designing energy efficient and high performance MAC protocols for wireless sensor networks. To break through the energy-latency tradeoff caused by duty cycling in the existing wireless sensor network, we propose a new RF wakeup sensor, which is a dedicated small RF module to check potential communications by sensing the presence of a RF signal. With RF wakeup sensor each node no longer requires duty cycling, eliminating both sleep delay and idle listening. The distinctive feature of our RF design from the existing radio sensor studies is that the RF wakeup sensor can provide the same sensitivity as the underlying RF communication module with two orders of magnitude lower energy consumption. To equalize the RF sensing range to the communication range, the RF wakeup sensor uses a dedicated amplifier for input signal. The amplifier can selectively sense signals on the predefined frequency band by employing a frequency filter that requires neither mixer nor oscillator. We evaluate the circuital characteristics of our RF wakeup sensor design by using Advanced Design System 2009 simulator. The results show that RF wakeup sensor allows a sensor node to completely turn off their communication module by performing the around-the-clock carrier sensing while it consumes only 1% energy of an idle communication module. Yong Soo Bae, Lynn Choi |
APCC | 3 |
| 2012 | On-demand radio wave sensor for wireless sensor networks: Towards a zero idle listening and zero sleep delay MAC protocolabstractIn wireless sensor networks (WSNs) duty cycling has been an imperative choice to reduce idle listening but it introduces sleep delay. Thus, the conventional WSN MAC protocols are bound by the energy-latency tradeoff. To break through the tradeoff, we propose a radio wave sensor called RF watchdog that is dedicated to sense the presence of a RF signal. The distinctive feature of our design is that the RF watchdog can provide the same sensitivity but with two orders of magnitude less energy than the underlying RF module. With RF watchdog a sensor node no longer requires duty cycling. Instead, it can maintain a sleep state until its RF watchdog detects a communication signal. We also propose an on-demand MAC protocol called ZeroMAC that can effectively utilize the on-demand wakeup functionality of a RF watchdog by broadcasting a dedicated signal to wake up nodes before starting a communication. ZeroMAC wakes up only the nodes on the communication path by propagating wakeup signals in a hop-by-hop manner, avoiding unnecessary signal flooding. To further save energy, a node in ZeroMAC can turn off its RF module as soon as it detects the end of communication. According to our detailed packet level simulation results, ZeroMAC can deliver data packets at least 1.87 times faster by eliminating both idle listening and sleep delay while it consumes only 3% of the energy compared to X-MAC and A-MAC. Yong Soo Bae, Lynn Choi |
GLOBECOM | 3 |
| 2010 | SPEED-MAC: Speedy and Energy Efficient Data Delivery MAC Protocol for Real-Time Sensor Network ApplicationsabstractIn this paper we consider the design of MAC protocol for real-time sensor network applications. Although existing wakeup scheduling techniques suggest end-to-end delay guarantees for such applications, their fixed wakeup schedules may not meet such constraints when multiple sensors compete for the event delivery at the same time. We propose a new MAC protocol called SPEED-MAC that can provide real-time delay guarantees with much lower energy consumption for both single-source and multi-source events. The main ideas underlying the protocol are two-fold. First, we introduce a novel wakeup technique called signaling wakeup period, which is small enough to detect collisions and contentions. By employing the signaling wakeup we can minimize the event report latency as well as the idle listening. Second, to resolve the collisions and contentions incurred by multi-source events, the protocol employs adaptive wakeups that combines static scheduling with contention-based media access control depending on the type of traffic. Our simulation results show that SPEED-MAC can achieve an order of magnitude energy savings while providing near optimal latency compared to the existing solutions. Lynn Choi, Jong-Arm Jun |
ICC | 1 |
| 2009 | Scalable packet classification through rulebase partitioning using the maximum entropy hashing
Lynn Choi, Sunil Kim, Moon-hae Kim |
IEEE/ACM Trans. Netw. | 1 |
| 2007 | AMAC: Traffic-Adaptive Sensor Network MAC Protocol through Variable Duty-Cycle OperationsabstractSensor network MAC protocols usually employ periodic sleep and wakeup, achieving low duty-cycle to save energy and to increase the lifetime of battery-powered sensor devices. However, existing protocols require all the sensor nodes to operate on the same static schedule, waking up all the nodes at the same fixed interval periodically. This paper proposes a new media access control protocol called AMAC that can achieve significant energy savings by dynamically changing the schedule of each node depending on the traffic. In AMAC, each node can adjust the duration of the periodic interval as well as the duration of the active period depending on the traffic. Thus, busy nodes can operate with a high duty-cycle while idle nodes can operate with a low duty-cycle at the same time, achieving both low-energy and high-performance. The results of our detailed simulations confirm that AMAC can reduce the average energy consumption by a factor of up to 6.8 compared to an existing fixed duty-cycle MAC protocol while it can also improve the network performance for burst traffic patterns. Joon Ho Park, Lynn Choi |
ICC | 3 |
| 2004 | Scalable Packet Classification through Maximum Entropy Hashing
Lynn Choi, Jaesung Heo, Jinoo Joung, Sunil Kim |
NETWORKING | 1 |
| 2003 | Branch predictor design and performance estimation for a high performance embedded microprocessorabstractAE64000 is a 64-bit embedded processor targeting high-end embedded applications such as HDTV, DVD, and 3D graphics. To achieve a higher performance for the AE64000, we design a branch predictor for the processor, and find the optimum parameters for the design through cycle-accurate simulations on SpecINT benchmarks and embedded applications (Dhrystone and Whetstone).In AE64000 branch prediction is complicated by the Instruction Folding Unit (IFU) of the processor front-end. By predicting on a Pre-PC in the IFU rather than using a PC in the pipeline core, we can effectively eliminate branch misprediction penalty on a correct prediction. We have developed the AE64000 simulator to evaluate the performance of the designed branch predictor, and selected the optimum branch predictor configuration by considering cost-effectiveness as well as by analyzing the results generated from AE64000 simulator. The selected branch predictor has been implemented in Verilog and is added to AE64000 pipeline. Sang-Hyuk Lee, Il-kwan Kim, Lynn Choi |
ASP-DAC | 3 |
| 2002 | WDM/SCM multiple access protocol with high throughput and low packet delay for passive double star networks
Jintae Yu, Myungmoon Lee, Yongbum Kim, Yongwon Lee, Sangrok Lee, Lynn Choi |
Comput. Networks | 6 |
| 2000 | Hardware and Compiler-Directed Cache Coherence in Large-Scale Multiprocessors: Design Considerations and Performance StudyabstractIn this paper, we study a hardware-supported, compiler-directed (HSCD) cache coherence scheme, which can be implemented on a large-scale multiprocessor using off-the-shelf microprocessors, such as the Cray T3D. The scheme can be adapted to various cache organizations, including multiword cache lines and byte-addressable architectures. Several system related issues, including critical sections, interthread communication, and task migration have also been addressed. The cost of the required hardware support is minimal and proportional to the cache size. The necessary compiler algorithms, including intra- and interprocedural array data flow analysis, have been implemented on the Polaris parallelizing compiler. From our simulation study using the Perfect Club benchmarks, we found that in spite of the conservative analysis made by the compiler, for four of six benchmark programs tested, the proposed HSCD scheme outperforms the full-map hardware directory scheme up to 70 percent while the hardware scheme outperforms the HSCD scheme in the remaining two applications up to 89 percent. Given its comparable performance and reduced hardware cost, the proposed scheme can be a viable alternative for large-scale multiprocessors such as the Cray T3D, which rely on users to maintain data coherence. Lynn Choi, Pen-Chung Yew |
IEEE Trans. Parallel Distributed Syst. | 1 |
| 2000 | Compiler Analysis for Cache Coherence: Interprocedural Array Data-Flow Analysis and Its Impact on Cache PerformanceabstractIn this paper, we present compiler algorithms for detecting references to stale data in shared-memory multiprocessors. The algorithm consists of two key analysis techniques, state reference detection and locality preserving analysis. While the stale reference detection finds the memory reference patterns that may violate cache coherence, the locality preserving analysis minimizes the number of such stale references by analyzing both temporal and spatial reuses. By computing the regions referenced by arrays inside loops, we extend the previous scalar algorithms for more precise analysis. We develop a full interprocedural array data-flow algorithm, which performs both bottom-up side-effect analysis and top-down context analysis on the procedure call graph to further exploit locality across procedure boundaries. The interprocedural algorithm eliminates cache invalidations at procedure boundaries, which were assumed in the previous compiler algorithms. We have fully implemented the algorithm in the Polaris parallelizing compiler. Using execution-driven simulations on Perfect Club benchmarks, we demonstrate how unnecessary cache misses can be eliminated by the automatic stale reference detection. The algorithm can be used to implement cache coherence in the shared-memory multiprocessors that do not have hardware directories, such as Cray T3D. Lynn Choi, Pen-Chung Yew |
IEEE Trans. Parallel Distributed Syst. | 1 |
| 1996 | Compiler and Hardware Support for Cache Coherence in Large-Scale Multiprocessors: Design Considerations and Performance StudyabstractIn this paper, we study a hardware-supported, compiler directed (HSCD) cache coherence scheme, which can be implemented on a large-scale multiprocessor using off-the-shelf microprocessors, such as the Cray T3D. It can be adapted to various cache organizations, including multi-word cache lines and byte-addressable architectures. Several system related issues, including critical sections, inter-thread communication, and task migration have also been addressed. The cost of the required hardware support is small and proportional to the cache size. The necessary compiler algorithms, including intra- and interprocedural array data-flow analysis, have been implemented on the Polaris compiler [17].From our simulation study using the Perfect Club benchmarks, we found that, in spite of the conservative analysis made by the compiler, the performance of the proposed HSCD scheme can be comparable to that of a full-map hardware directory scheme. With its comparable performance and reduced hardware cost, the scheme can be a viable alternative for large-scale multiprocessors, such as the Cray T3D, that rely on users to maintain data coherence. Lynn Choi, Pen-Chung Yew |
ISCA | 1 |
| 1996 | The Design and Performance Evaluation of the DI-Multicomputer
Lynn Choi, Andrew A. Chien |
J. Parallel Distributed Comput. | 1 |
| 1994 | A compiler-directed cache coherence scheme with improved intertask localityabstractWe introduce a compiler directed coherence scheme which can exploit most of the temporal and spatial locality across task boundaries. It requires only an extended tag field per cache word, one modified memory access instruction, and a counter called the epoch counter in each processor. By using the epoch counter as a system wide version number, the scheme simplifies the cache hardware of previous version control (Hoichi Cheong and A.V. Veidenbaum, 1989) or timestamp based schemes (S.L. Min and J.-L. Baer, 1989), but still exploits most of the temporal and spatial locality across task boundaries. We present a compiler algorithm to generate the appropriate memory access instructions for the proposed scheme. The algorithm is based on a data flow analysis technique. It identifies potential stale references by examining memory reference patterns in a source program.> Lynn Choi, Pen-Chung Yew |
SC | 1 |