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Dale D. Miller

dblp:66/3006 · DBLP profile ↗
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1ranked-venue papers
1as first author
0since 2021 · last 1983
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Integrated circuit design · 70% Reconfigurable computing and FPGAs · 30%

Topics — the 3 heaviest of 4, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Reconfigurable computing and FPGAs › FPGA-based signal processing
adaptive filtering
0.011983
A Residue Number System Implementation of the LMS Algorithm Using Optical Waveguide Circuits · IEEE Trans. Computers 1983
Integrated circuit design
digital signal processing circuits
0.011983
A Residue Number System Implementation of the LMS Algorithm Using Optical Waveguide Circuits · IEEE Trans. Computers 1983
Integrated circuit design › residue number system arithmetic
residue number system processor
0.011983
A Residue Number System Implementation of the LMS Algorithm Using Optical Waveguide Circuits · IEEE Trans. Computers 1983

Methods — techniques the papers use, named apart from their topics

residue number system · 0.0least-mean-square algorithm · 0.0chinese remainder theorem · 0.0
YearPublicationVenuePosition
1983 A Residue Number System Implementation of the LMS Algorithm Using Optical Waveguide Circuits
abstract
A detailed design of a real-time data processor based on the residue number system is presented which uses near-term optical waveguide devices and concepts. The optical computational units consist of cascaded, mask-programmable arrays of total internal reflection electrooptic switches arranged on a LiNbO3 substrate in a serpentine configuration. This paper describes these computational units and then concentrates on the computational and residue-related aspects of the processor. A new scaling algorithm is presented which is based on the Chinese remainder theorem and performs scaling during a single clock period. The least-mean-square adaptive filter algorithm with eight weights is tailored to the optical waveguide residue arithmetic format and requires only three computational stages per iteration. Detailed computer simulations of the processor have verified the design and representative output is included. An envisioned 8 ns clock period corresponds to 2.5 × 109 operations/s ( 2.5 G operations/s) using the equivalent of 23 bit internal precision, which compares favorably to expected rates using established technologies.
Dale D. Miller, John N. Polky
IEEE Trans. Computers1