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Marina Valdinoci

dblp:66/3146 · DBLP profile ↗
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1ranked-venue papers
0as first author
0since 2021 · last 1996
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Integrated circuit design · 100%

Topics — the 2 heaviest of 2, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Integrated circuit design › analog and mixed-signal circuits
device modeling		 0.011996
AC analysis of amorphous silicon devices · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1996
Integrated circuit design › semiconductor device modeling
thin-film transistor modeling		 0.011996
AC analysis of amorphous silicon devices · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1996

Methods — techniques the papers use, named apart from their topics

continuity equation solution · 0.0ac analysis · 0.0
YearPublicationVenuePosition
1996 AC analysis of amorphous silicon devices
abstract
The transport model in semiconductors is examined in the case where the effect of distributed gap states is significant like, e.g., in thin-film transistors. A solution scheme is derived for the two additional continuity equations accounting for the trapped charge such that, without loss of generality, the efficiency of the traditional method implemented in the existing device-analysis codes is kept. The dynamic effect of the trapped charge is then examined in the ac operation of a realistic thin-film device, including the analysis of the interelectrode capacitances.
Aurelio Pellegrini, Luigi Colalongo, Marina Valdinoci, Massimo Rudan
 IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.3