Techniques for advanced logic design in spatial dimensions for the purposes of nano-devices and nanoICs are being formulated to incorporate certain topologies that satisfy certain requirements of nanotechnology. The hypercube is considered a relevant topology for the design of the N-hypercube in which switching functions are embedded. We propose using a similar topology for designing of sequential logic in spatial dimensions. The M-hypercube which is an extension of the hypercube topology is introduced as a building block for spatial sequential logic design. This cube can represent any finite state machine with any possible configuration. An MN-cell which is a combination of M- and N-hypercubes is introduced with several examples containing various embedding and assignment techniques of the M-hypercube and MN-cell. This paper presents logic design approaches to reduce the complexity of large M-hypercube representation via sequential machine decomposition. A study of the logic design of a basic computer in nanospace using M- and N-hypercube cells as building blocks is also presented with several examples included.