No abstract available.

Panel SummaryWho and what are standards for?Are standards there to protect users' investments and ease the design of working, integrated solutions or are they there to generate product opportunities for suppliers?Given enough confusion in the market place the effect is to turn standards into supplier's opportunity, at the expense of users' protection.Extensions, registrations, revisions, profiles, and levels of certification all conspire to confuse the situation.The pressure to adopt Publicly Available Specifications and the perceived advantages of "de facto" standards can undermine the protective intent of "de jure" standards.This panel debates different attitudes to standards, often associated with different sides of the Atlantic, but also between standardiser, politician, supplier and user.Concern over slow progress in ISO growing, but even concern is slow to take effect!Political pressure for change has never been stronger (for example at the recent CEC workshop on choosing standardisation policy -attended by 350+ delegates.Proposed methods of standardisation often assume that fasttracking PASs will produce a better result, more speedily, but ignore the lack of success of fast-tracking to date in the graphics area.Related topics for discussion include: 1) Is conformance certification worth the cost?2) Portability v Extensibility? 3) Upwards compatibility-how is/should existing investment in products be protected.4) Should registered items be allowed as a way of bypassing standards?5) How should profiling be used.6) De facto v de jure standardisation.7) Can/should fast-tracking PASs be made to work?

No abstract available.

Raster devices, such as digital plotters, CRT or plasma panel displays, and matrix or ink jet printers, represent ‘straight’ lines in quantized fashion as a sequence of unit axial and unit diagonal steps. Dichotomous run lengths and periodic repetitive patterns in these incremental or digital lines provide a basis by which the step sequences for quantized lines can be treated in compressed form for storage or transmission. Earnshaw recently published a paper describing an investigation of two compaction alternatives encoding either run lengths or repeated patterns. This paper describes a simple algorithm to incorporate both run length and repeated pattern encoding for step sequence compaction. Also illustrated is the similarity in form of the repetitive loop used to generate either runs or single steps and either full lines or periodic patterns; initial parameter values differ, but the subsequent iterative process is identical.