This paper studies the reconfiguration problem within a 2D MIMD machine, once the testing process is accomplished. For that, three fault-tolerant routing algorithms are proposed and their efficiency illustrated. The implementation results are also given.

The authors present two applications of a specific cellular architecture: emulation of the recall and learning for feedforward neural networks and parallel image reconstruction. This architecture is based on a bidimensional array of asynchronous processing elements, the cells, which can communicate between themselves by message transfers. Each cell includes a rotating routing part ensuring the message transportation through the array and a processing part dedicated to a particular application. The specificity of the processing part demands that it be redesigned for each application but leads to very fast computing and low complexity. This architecture can process algorithms not regular enough for SIMD machines. The cellular architecture is described, the feedforward neural network accelerator is introduced, the learning is discussed, and some time performances, evaluated by computer simulation, are given. The image reconstruction problem, its parallelization, some results of both functional and behavioral simulations, the realization of the circuit, and some test results are presented.>

This paper describes one of the new methodologies for IC design currently being used at the CNET. The main features detailed are the symbolic layout method called MDMOS and the integrated CAD system CASSIOPEE. Its most significant advantages are design safety, elimination of costly and inefficient checks and supply of technical specifications which are always up-to-date. This methodology is described in its entirety starting from the logical description, and including all stages up to masks generation.