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Atul Sharan

dblp:73/4764 · DBLP profile ↗
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2ranked-venue papers
0as first author
0since 2021 · last 2006
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 2

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
2 papers
Electronic design automation · 89% Integrated circuit design · 11%

Topics — the 3 heaviest of 3, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Electronic design automation
design for manufacturability
0.122006
DFM: where's the proof of value? · DAC 2006
DFM rules! · DAC 2005
Electronic design automation › design for manufacturability › design for yield
yield enhancement
0.012006
DFM: where's the proof of value? · DAC 2006
Integrated circuit design
nanometer technology
0.012005
DFM rules! · DAC 2005
YearPublicationVenuePosition
2006 DFM: where's the proof of value?
abstract
How can design teams employ new tools and develop response methodologies yet still stay within design budgets? How much effort does it require to be an early adopter and what kind of measurable results compensate for this effort? Panelists discuss how their design-for-manufacture (DFM) tools fit into a fixed design methodology, budget and timeline, and give examples of expected ROI (monetary, quality, reduced time-to-market, and comprehensive yield).The aim of this panel is to provide a serious comparison of related DFM technologies on the market and some idea of the cost and difficulty of integrating the tools into a fixed design budget and timeline. Specific results will be cited, along with examples of expected ROI (monetary, quality, reduced time-to-market, and comprehensive yield enhancement).The audience should walk away with enough information to make an informed decision on which companies would make sense for their DFM challenges, to reach their own yield and throughput goals.
Shishpal Rawat, Raúl Camposano, Andrew B. Kahng, Joseph Sawicki, Mike Gianfagna, Naeem Zafar, Atul Sharan
DAC7
2005 DFM rules!
abstract
For sub-100nm processes, predictions are putting initial process yields in the single digits. At the same time, at 130nm, we saw that two chips designed with the same methodology and same design rules could deliver completely different manufacturing yields.This panel will discuss the reasons for these phenomena and talk about future trends in DFM that will need to be addressed for success below 100nm.
Naveed A. Sherwani, Susan Lippincott Mack, Alex Alexanian, Premal Buch, Carlo Guardiani, Harold Lehon, Peter Rabkin, Atul Sharan
DAC8