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Peter Rickert

dblp:75/2451 · DBLP profile ↗
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1ranked-venue papers
0as first author
0since 2021 · last 2009
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Integrated circuit design · 100%

Topics — the 3 heaviest of 3, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Integrated circuit design
technology scaling
0.112009
Moore's Law: another casualty of the financial meltdown? · DAC 2009
Integrated circuit design
3d integration
0.012009
Moore's Law: another casualty of the financial meltdown? · DAC 2009
Integrated circuit design › packaging
system-in-package
0.012009
Moore's Law: another casualty of the financial meltdown? · DAC 2009

Methods — techniques the papers use, named apart from their topics

return-on-investment analysis · 0.1
YearPublicationVenuePosition
2009 Moore's Law: another casualty of the financial meltdown?
abstract
Given the exponential increase of fabrication costs, the global recession and credit crunch, one may ask if Moore's Law is financially viable beyond 22nm node. Can we justify the return-of-investment (ROI) for continuous scaling beyond 22nm? Shall we consider other alternatives for integration, such as silicon-in-a-package (SiP) or 3D integrations?
Jason Cong, N. S. Nagaraj, Ruchir Puri, William H. Joyner, Jeff Burns, Moshe Gavrielov, Riko Radojcic, Peter Rickert, Hans Stork
DAC8