Demonstration venue · read-only. Every page can be browsed; the buttons that would change it are switched off. Create an account to run TaxoReview on your own data. A simulation from public publication records: the people listed were not invited and did not agree to review.
? Tutorial for this page
Demo Data from SIGIR 2026 / reviewers in the wild / expert

Alfonso Maurelli

dblp:75/6641 · DBLP profile ↗
← Back
1ranked-venue papers
1as first author
0since 2021 · last 2009
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Applied, interdisciplinary, general and emerging computing · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Integrated circuit design · 100%

Topics — the 3 heaviest of 3, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Integrated circuit design › packaging
system-in-package		 0.112009
SoC and SiP, the Yin and Yang of the Tao for the New Electronic Era · Proc. IEEE 2009
Integrated circuit design
system-on-chip		 0.112009
SoC and SiP, the Yin and Yang of the Tao for the New Electronic Era · Proc. IEEE 2009
Integrated circuit design
heterogeneous integration		 0.012009
SoC and SiP, the Yin and Yang of the Tao for the New Electronic Era · Proc. IEEE 2009
YearPublicationVenuePosition
2009 SoC and SiP, the Yin and Yang of the Tao for the New Electronic Era
abstract
ldquoMore than Moorerdquo is becoming the password for these coming years. New steps to overcome technology limitations to diffuse, on the same die, different chips to have a complete system have been developed. This approach is called system in package (SiP), a way to have in a package dies of logic, analog, memory, passive components, etc., assembled to obtain a miniaturized board. SiP performances and limitations are here analyzed to understand advantages versus system on chip (SoC). This paper is a discussion about the main items that can lead to the choice of the right approach-SiP or SoC-before a system design start. Three persons attend to our virtual meeting: an SoC technology development manager, expert in microcontroller embedded memories and technology integration; an SiP analog radio-frequency design senior expert; and a moderator that designed embedded memories and now SiP, all involved to understand how to reach a tradeoff among these two approaches. Like for the Yin and Yang, symbol of the equilibrium for the Taoist philosophy, the two opposites divide the circle of the life, with a piece of each in the other.
Alfonso Maurelli, Didier Belot, Giovanni Campardo
 Proc. IEEE1