Demo Data from SIGIR 2026 / reviewers in the wild / expert
Niloofar Razavi
dblp:79/1592
· DBLP profile ↗
9ranked-venue papers
5as first author
2since 2021 · last 2026
—ORCID · unresolved
Domains — the database's venue-derived domains; a paper can count in several
Software engineering, systems software and programming languages · 8 · 4 first-author · 2 since 2021Theory of computation · 2 · 1 first-author · 1 since 2021Systems, architecture and hardware · 1 · 1 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Software engineering, system software, and programming languages
2 papers |
Software testing · 74% Debugging and program repair · 13% Concurrent programming · 13% | |
| Theoretical computer science
1 paper |
Automated reasoning and model checking · 100% | |
| Network and information security
1 paper |
Systems and software security · 100% | |
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Cloud and datacenter computing · 100% | |
| Artificial intelligence
1 paper |
Language models and text generation · 100% |
Topics — the 10 heaviest of 10, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Automated reasoning and model checking › automated reasoning › mathematical reasoning
autoformalization |
1.0 | 1 | 2026 | A Neurosymbolic Approach to Natural Language Formalization and Verification · CAV (2) 2026 |
Systems and software security
configuration security |
0.8 | 1 | 2024 | Cloud Resource Protection via Automated Security Property Reasoning · ASE 2024 |
Cloud and datacenter computing
cloud security |
0.8 | 1 | 2024 | Cloud Resource Protection via Automated Security Property Reasoning · ASE 2024 |
Software testing
concurrency testing |
0.3 | 2 | 2013 | Con2colic testing · ESEC/SIGSOFT FSE 2013 Predicting null-pointer dereferences in concurrent programs · SIGSOFT FSE 2012 |
Natural language and speech › Language models and text generation › large language model safety
LLM guardrail |
0.3 | 1 | 2026 | A Neurosymbolic Approach to Natural Language Formalization and Verification · CAV (2) 2026 |
Software testing › test input generation
concolic testing |
0.2 | 1 | 2013 | Con2colic testing · ESEC/SIGSOFT FSE 2013 |
Software testing › concurrency testing
schedule exploration |
0.2 | 1 | 2013 | Con2colic testing · ESEC/SIGSOFT FSE 2013 |
Software testing
test input generation |
0.2 | 1 | 2013 | Con2colic testing · ESEC/SIGSOFT FSE 2013 |
Concurrent programming › concurrency bugs
concurrency bug prediction |
0.1 | 1 | 2012 | Predicting null-pointer dereferences in concurrent programs · SIGSOFT FSE 2012 |
Debugging and program repair
fault localization |
0.1 | 1 | 2012 | Predicting null-pointer dereferences in concurrent programs · SIGSOFT FSE 2012 |
Methods — techniques the papers use, named apart from their topics
large language model · 2.0automated reasoning · 2.0security invariants · 1.5automated security reasoning · 1.5interference scenarios · 0.2concrete and symbolic execution · 0.2static lock-set analysis · 0.1constraint solving · 0.1SMT solving · 0.1
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2026 | A Neurosymbolic Approach to Natural Language Formalization and VerificationabstractAbstract Large Language Models perform well at natural language interpretation and reasoning, but their lack of formal correctness guarantees limits their adoption in regulated industries like finance and healthcare that operate under strict policies. To address this limitation, we launched Automated Reasoning checks (ARc) : a public service that (1) uses LLMs with optional human guidance to formalize natural language policies, allowing fine-grained control of the formalization process, and (2) uses inference-time autoformalization to validate logical correctness of natural language statements against those policies. ARc performs multiple redundant formalization steps at inference time, checking the formalizations for semantic equivalence. Our benchmarks show that ARc exceeds 99% soundness and achieves a near-zero false positive rate in identifying logical validity. Our approach produces auditable artifacts that substantiate the verification outcomes and can be used to improve the original text. ARc is the first commercial offering from a major cloud provider to integrate automated reasoning into a generative AI guardrail. Chenyang An, Sam Bayless, Stefano Buliani, Darion Cassel, Byron Cook, Duncan Clough, Rémi Delmas, Nafi Diallo, Ferhat Erata, Nick Feng, Dimitra Giannakopoulou, Aman Goel, Aditya Gokhale, Joe Hendrix, Victor Heorhiadi, Marc Hudak, Dejan Jovanovic, Andrew M. Kent, Benjamin Kiesl-Reiter, Jeffrey J. Kuna, Nadia Labai, Joe Lilien, Divya Raghunathan, Zvonimir Rakamaric, Niloofar Razavi, Michael Tautschnig, Ali Torkamani, Nathaniel Weir, Michael W. Whalen, Jianan Yao |
CAV (2) | 25 |
| 2024 | Cloud Resource Protection via Automated Security Property ReasoningabstractAs cloud computing gains widespread adoption across various industries, securing cloud resources has become a top priority for cloud providers. However, ensuring configuration security among highly interconnected cloud resources is challenging due to the complexities of resource modeling, correlation analysis, and large-scale security checks. To tackle those practical challenges, we propose Security Invariants (SI), a precise, effective, and scalable tool that proactively protects cloud resources by automated security reasoning. We have integrated SI into the rigorous Amazon Web Services (AWS) security review process. Partnered with security engineers and other security scanners, SI periodically scans billions of cloud resources in pre-launch services for potential security risks, maximizing the security guarantees of cloud applications. The continuous assessment of evolving resources not only brings a deep understanding of cloud security risks but also introduces a generalized solution from the holistic security analysis perspective. Zhixing Xu, Shengjian Guo, Oksana Tkachuk, Saeed Nejati, Niloofar Razavi, George Argyros |
ASE | 5 |
| 2014 | Generating effective tests for concurrent programs via AI automated planning techniques
Niloofar Razavi, Azadeh Farzan, Sheila A. McIlraith |
Int. J. Softw. Tools Technol. Transf. | 1 |
| 2013 | Con2colic testingabstractIn this paper, we describe (con)2colic testing - a systematic testing approach for concurrent software. Based on concrete and symbolic executions of a concurrent program, (con)2colic testing derives inputs and schedules such that the execution space of the program under investigation is systematically explored. We introduce interference scenarios as key concept in (con)2colic testing. Interference scenarios capture the flow of data among different threads and enable a unified representation of path and interference constraints. We have implemented a (con)2colic testing engine and demonstrate the effectiveness of our approach by experiments. Azadeh Farzan, Andreas Holzer, Niloofar Razavi, Helmut Veith |
ESEC/SIGSOFT FSE | 3 |
| 2012 | Concurrent Test Generation Using Concolic Multi-trace Analysis
Niloofar Razavi, Franjo Ivancic, Vineet Kahlon, Aarti Gupta |
APLAS | 1 |
| 2012 | Bounded-Interference Sequentialization for Testing Concurrent Programs
Niloofar Razavi, Azadeh Farzan, Andreas Holzer |
ISoLA (1) | 1 |
| 2012 | Predicting null-pointer dereferences in concurrent programsabstractWe propose null-pointer dereferences as a target for finding bugs in concurrent programs using testing. A null-pointer dereference prediction engine observes an execution of a concurrent program under test and predicts alternate interleavings that are likely to cause null-pointer dereferences. Though accurate scalable prediction is intractable, we provide a carefully chosen novel set of techniques to achieve reasonably accurate and scalable prediction. We use an abstraction to the shared-communication level, take advantage of a static lock-set based pruning, and finally, employ precise and relaxed constraint solving techniques that use an SMT solver to predict schedules. We realize our techniques in a tool, ExceptioNULL, and evaluate it over 13 benchmark programs and find scores of null-pointer dereferences by using only a single test run as the prediction seed for each benchmark. Azadeh Farzan, P. Madhusudan, Niloofar Razavi, Francesco Sorrentino 0002 |
SIGSOFT FSE | 3 |
| 2010 | Sysfier: Actor-based formal verification of SystemCabstractSystemC is a system-level modeling language that can be used effectively for hardware/software co-design. Since a major goal of SystemC is to enable verification at higher levels of abstraction, the tendency is now directing to introducing formal verification approaches for SystemC. In this article, we propose an approach for formal verification of SystemC designs, and provide the semantics of SystemC using Labeled Transition Systems (LTS) for this purpose. An actor-based language, Rebeca, is used as an intermediate language. SystemC designs are mapped to Rebeca models and then Rebeca verification toolset is used to verify LTL and CTL properties. To tackle the state-space explosion, Rebeca model checkers offer some reduction policies that make them appropriate for SystemC verification. The approach also benefits from the modular verification and program slicing techniques applied on Rebeca models. To show the applicability of our approach, we verified a single-cycle MIPS design and two hardware/software co-designs. The results show that our approach can effectively be used both in hardware and hardware/software co-verification. Niloofar Razavi, Razieh Behjati, Hamideh Sabouri, Ehsan Khamespanah, Amin Shali, Marjan Sirjani |
ACM Trans. Embed. Comput. Syst. | 1 |
| 2006 | Using Reo for formal specification and verification of system designsabstractIn this paper, we introduce a component-based approach to specify and verify system-level designs. A coordination language, Reo, is used to support hierarchical design and verification. We move from functional specification to implementation through different levels of abstraction, considering TLM/RTL mixed levels and hardware/software co-designs. We discuss the mapping of a system design written in SystemC to Reo circuits, and how we can compositionally construct its behavior using constraint automata. A case study is used to show the applicability of our approach Niloofar Razavi, Marjan Sirjani |
MEMOCODE | 1 |