Electrical chip- and board-level connections are becoming more and more a bottleneck in computation. A solution to that problem could be optical connections, which allow a higher bandwidth. The usage of free space optics can avoid the problem of crosstalk and geometrical signal path crossings in systems with a high density of interconnections. The choice of appropriate design parameters, allowing the realization of such interconnections, is a complicated task. We present an evolutionary algorithm that is able to find these parameters. We describe the parallel execution of that algorithm and present optimization results.

The increasing transistor density in very large-scale integrated (VLSI) circuits and the limited pin member in the off-chip communication lead to a situation described as interconnect crisis in micro-electronics. Optoelectronic VLSI (OE-VLSI) circuits using short-distance optical interconnects and optoelectronic devices like microlaser, modulator, and detector arrays for optical off-chip sending and receiving offer a technology to overcome this crisis. However, in order to exploit efficiently the potential of thousands of optical off-chip interconnects, an appropriate VLSI architecture is required. We show for the example of neural and reconfigurable VLSI architectures that fine-grain architectures fulfill these requirements. An OE-VLSI circuit realization based on multiple quantum-well modulators functioning as two-dimensional (2-D) optical input/output (I/O) interface for the chip is presented. Due to the parallel optical interface, and improvement of two to three orders of magnitude in the throughput performance is possible compared to all-electronic solutions. For the optical interconnects, a planar-integrated free-space optical system has been designed leading to an optical multichip module. Such a system has been fabricated and experimentally characterized. Furthermore, we designed an manufactured fiber arrays, which will be the core element for a convenient test station for the 2-D optoelectronic I/O interface of OE-VLSI circuits.

Planar optics is an approach to build integrated free-space optical systems on single substrates. Computer-aided design, lithographic fabrication, and micro-bonding techniques are used to package the optics in a compact way. This paper reviews recent work on planar optics. It discusses various aspects of the fabrication, the design, and the application of planar optics as an interconnection technology for optoelectronic computing and switching systems.>

The authors discuss digital optics, a technology for processing, transport, and storage of optical digital information. Digital optics offers both the high temporal bandwidth of fiber communications and the high connectivity and information density of optical imaging. The energy dissipation per bit of communicated information, as well as the chip area dedicated to interconnections, can be significantly lower in optics than in high-speed electronics. This motivates the introduction of parallel optical interconnections through free space in communication-intensive areas of digital information processing such as switching in telecommunications and within multiprocessors. Digital optical circuits can be constructed by cascading two-dimensional planar arrays of optical logic gates interconnected in free space. The state of the art and the trends in digital optical information processing systems for optical logic, optoelectronic interfaces, and optical free-space interconnection systems are reviewed.>

The crossover network is introduced as a novel type of interconnection network for applications in optical digital computing, optical switching, and signal processing. It is isomorphic to other log/sub 2/(N) networks such as the perfect shuffle and the Banyan network. This means that algorithms which are based on the Banyan, such as FFT (fast Fourier transform) algorithms, can be translated to a crossover-based implementation. Using free-space optics it is possible to implement as many as 128*128 connections between two chips of optical logic devices. A setup for the implementation of crossover networks is proposed and demonstrated.>