During the past decades the reports produced by the satellites regarding the clouds became important for the weather prediction, the climate and lately for the generation and the distribution of the solar power. Image segmentation techniques produce these reports and they exploit convolutional neural networks (CNNs) to improve the accuracy results at the expense though of the requirements for execution time and hardware resources. Aiming at improving this trade-off the current work studies the design of a CNN model targeting the placement and the execution on a SoC FPGA while keeping the high accuracy. Moreover, it studies how to optimize the performance by distributing the execution of the CNN’s functions among the SoC’s IP cores and the SoC’s logic. The results are validated by using the Vitis-AI framework to implement the proposed CNN on a Xilinx Zynq UltraScale+ MPSoC ZCU104 board.

We present an innovative protocol processor component that combines wire-speed processing for low-level, and best effort processing for higher-level protocols. The component is a System-on-Chip that integrates variable size packet buffering, specialised cores for header and field processing, generic RISC cores and scheduling blocks. We focus on the main innovation, the reprogrammable pipeline module, and discuss its internal architecture, optimised to perform field processing on byte streams, as well as protocol processing on complex data structures. Furthermore, we present how modern and new tools were used in system dimensioning, design, and verification phases. The chip is able to handle up to 512K flows organised in individual queues. It embeds 5 custom cores optimised for field processing, 3 typical RISC cores for packet processing and 11 generic and application specific hardware blocks. It's been prototyped in UMC 0.18/spl mu/m CMOS technology in a 1096-pin BGA package and operates at 200MHz for 2.5Gbps links.

In high-speed network processors, data queueing has to allow real-time memory (de)allocation, buffering, retrieving, and forwarding of incoming data packets. Its implementation must be highly optimized to combine high speed, low power, large data storage, and high memory bandwidth. In this paper, such data queueing is used as case study to demonstrate the effectiveness of a new system-level exploration method for optimizing the memory performance in dynamic memory management. Assuming that a multi-bank memory architecture is used for data storage, the method trades off bank conflicts against memory accesses during real-time memory (de)allocation. It has been applied to the data queueing module of the PRO3 system [8]. Compared with the conventional memory management technique for embedded systems, our exploration method can save up to 90% of the bank conflicts, which allows to improve worst-case memory performance of data queueing operations by 50% too.

The performance evaluation of broadband networks requires statistical analysis and modeling of the actual network traffic. Since multimedia services, and especially variable bit rate (VBR) MPEG-coded video streams are expected to be a major traffic component carried by these networks, modeling of such services and accurate estimation of network resources are crucial for proper network design and congestion-control mechanisms that can guarantee the negotiated quality of service at a minimum cost. The layer modeling of MPEG-1 coded video streams and statistical analysis of their traffic characteristics at each layer is proposed, along with traffic models capable of estimating the network resources over asynchronous transfer mode (ATM) links. First, based on the properties of the entire MPEG-1 sequence (frame layer signal), a model (Model A) is presented by correlating three stochastic processes in discrete time (autoregressive models), each of which corresponds to the three types of frames of the MPEG encoder (I, P, and B frames). To simplify the traffic Model A and to reduce the required number of parameters, we study the MPEG stream at a higher layer by considering a signal, which expresses the average properties of I, P, and B frames over a group of picture (GOP) period. However, models on this layer cannot accurately estimate the network resources, especially in multiplexing schemes. For this reason, an intermediate layer is introduced, which exploits and efficiently combines information of both the aforementioned layers, producing a model (Model B), which requires much smaller number of parameters than Model A and simultaneously provides satisfactory results as far as the network resources are concerned. Evaluation of the validity of the proposed models is performed through experimental studies and computer simulations, using several long duration VBR MPEG-1 coded sequences, different from that used in modeling. The results indicate that both Models A and B are good estimators of video traffic behavior over ATM links at a wide range of utilization.

This paper performs issues relative to modeling of VBR MPEG coded video sources over ATM B-ISDN networks. Firstly, we analyse the statistical characteristics of the three types of frames, which the MPEG algorithm generates, and we study their autocovariance and probability density functions. Based on the data analysis, we propose two new source models which approximate both the statistical properties and the traffic characterization of MPEG sequences. The second source model (model B) has been introduced in order to reduce significantly the number of parameters which are necessary for our modeling. To verify the good fitness of the proposed new models, a statistical multiplexing configuration over ATM B-ISDN networks has been implemented and cell as well as frame loss probability have been estimated when the bit stream of video sources is generated by the real data and the two proposed models.

This paper describes the design and implementation of a PC terminal supporting ATM signalling and its incorporation in an ATM test-bed for the provision of multimedia services. It presents the method that was adopted to test the signalling stack for compliance to the respective specifications. The role of signalling functionality in service provision is also assessed, both from the functional and performance evaluation point of view. The ATM terminal service provision capabilities were demonstrated with a real-time video distribution application and resulted in one of the first experiments, involving a multimedia application integrated with the signalling protocol stack infrastructure.

The paper contributes to currently debated key issues on the evolution of ATM networks and their standardisation. It takes the view that since the asynchronous transfer mode has features of both circuit and packet switching, one has to selectively draw benefits for different types of traffic, compromising, if necessary, the integration principle. The use of the available bit rate (ABR), promoted by the ATM Forum for handling time insensitive (best effort) traffic, is fully adopted and its influence on switching discussed in detail. Coupled with ABR for transmission, the paper supports the employment of massive memory within the switching equipment. By suggesting solutions to key memory management problems, it also examines the use of X.25-like flow and congestion control, selectively employed for data transfer over ATM networks.