Demo Data from SIGIR 2026 / reviewers in the wild / expert
Ramakrishna Bachimanchi
dblp:83/3416
· DBLP profile ↗
2ranked-venue papers
0as first author
0since 2021 · last 2010
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 1Security and privacy · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Network and information security
2 papers |
Cryptographic primitives and cryptanalysis · 100% | |
| Computer architecture, parallel and distributed computing, and storage systems
2 papers |
Reconfigurable computing and FPGAs · 100% |
Topics — the 4 heaviest of 5, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Reconfigurable computing and FPGAs
FPGA-based cryptanalysis |
0.1 | 1 | 2010 | Area-Time Efficient Implementation of the Elliptic Curve Method of Factoring in Reconfigurable Hardware for Application in the Number Field Sieve · IEEE Trans. Computers 2010 |
Cryptographic primitives and cryptanalysis
integer factorization |
0.1 | 2 | 2010 | Implementing the Elliptic Curve Method of Factoring in Reconfigurable Hardware · CHES 2006 Area-Time Efficient Implementation of the Elliptic Curve Method of Factoring in Reconfigurable Hardware for Application in the Number Field Sieve · IEEE Trans. Computers 2010 |
Cryptographic primitives and cryptanalysis › integer factorization
elliptic curve method |
0.1 | 1 | 2006 | Implementing the Elliptic Curve Method of Factoring in Reconfigurable Hardware · CHES 2006 |
Cryptographic primitives and cryptanalysis › integer factorization
number field sieve |
0.0 | 1 | 2010 | Area-Time Efficient Implementation of the Elliptic Curve Method of Factoring in Reconfigurable Hardware for Application in the Number Field Sieve · IEEE Trans. Computers 2010 |
Methods — techniques the papers use, named apart from their topics
hardware porting · 0.2area-time optimization · 0.2elliptic curve method · 0.1
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2010 | Area-Time Efficient Implementation of the Elliptic Curve Method of Factoring in Reconfigurable Hardware for Application in the Number Field SieveabstractA novel portable hardware architecture of the Elliptic Curve Method of factoring, designed and optimized for application in the relation collection step of the Number Field Sieve, is described and analyzed. A comparison with an earlier proof-of-concept design by Pelzl et al. has been performed, and a substantial improvement has been demonstrated in terms of both the execution time and the area-time product. The ECM architecture has been ported across five different families of FPGA devices in order to select the family with the best performance to cost ratio. A timing comparison with the highly optimized software implementation, GMP-ECM, has been performed. Our results indicate that low-cost families of FPGAs, such as Spartan-3 and Spartan-3E, offer at least an order of magnitude improvement over the same generation of microprocessors in terms of the performance to cost ratio, without the use of embedded FPGA resources, such as embedded multipliers. Kris Gaj, Soonhak Kwon, Patrick Baier, Paul Kohlbrenner, Hoang Le, Mohammed Khaleeluddin, Ramakrishna Bachimanchi, Marcin Rogawski |
IEEE Trans. Computers | 7 |
| 2006 | Implementing the Elliptic Curve Method of Factoring in Reconfigurable Hardware
Kris Gaj, Soonhak Kwon, Patrick Baier, Paul Kohlbrenner, Hoang Le, Mohammed Khaleeluddin, Ramakrishna Bachimanchi |
CHES | 7 |