Hardware-based parallel computing is proposed for acceleration of finite-element (FE) analysis of linear elastic deformation models. An implementation of the Preconditioned Conjugate Gradient algorithm on N Field Programmable Gate Array (FPGA) devices solves the large linear system of equations arising from the FE discretization. The system employs a large number of customized fixed-point computing units with a high-throughput memory architecture. An implementation of this scalable architecture on four Altera EP3SE110 FPGA devices yields a peak performance of 604 Giga Operations per second. This enables haptic simulation of a 3-dimensional deformable object of 21000 elements at an update rate of 400Hz.

This paper introduces a hardware-efficient controller for rectifiers with power factor correction (PFC) that feature circuits for cancellation of the output voltage ripple at two times the line frequency. It provides simultaneous and independent regulation of the ripple amplitudes and dc voltage values for both the PFC stage and the cancellation circuit, allowing for the tradeoff management between the overall system volume and its efficiency. Unlike previous solutions, the controller does not require costly components for obtaining information about the output current, converter parameters, or phase and frequency of the voltage ripple. These advantages are obtained through the hardware sharing and use of a novel two-band compensator. The effectiveness of the controller is demonstrated on a 45 W programmable-output flyback based PFC rectifier prototype with a buck-boost based ripple cancellation circuit. The results demonstrated achieves a 1% ripple for the full range of operating conditions with maximum of 90% ripple reduction while utilizing a 500uF output capacitor for PFC, providing high power factor and low harmonic distortion.

This paper introduces a new power supply for solenoid fuel injectors of internal combustion engines. In comparison with the conventional solutions, the presented supply has smaller volume, higher reliability, and can be implemented with less expensive power stage components. The supply is a hybrid topology, combining boost and non-inverting buck-boost phases regulated by a digital load-interactive controller. Experimental results obtained with a 12V-to-50V, 40W, 100KHz converter confirm operation without bulky and unreliable electrolytic capacitors, 11 times smaller output capacitance and two times faster dynamic response compared to the conventional single-phase boost solution.

High-fidelity simulations of haptic interaction with deformable objects is computationally challenging. In this paper, hardwarebased parallel computing is proposed for finite-element (FE) analysis of soft-object deformation models. A distributed implementation of the Preconditioned Conjugate Gradient (PCG) algorithms on N Field Programmable Gate Array (FPGA) devices can solve the large system of equations arising from FE models at high update rates required for stable haptic interaction. Massive parallelization of the computations is achieved by customizing the hardware architecture to the problem at hand and concurrently employing a large number of adaptive fixed-point computing units. An implementation of this scalable hardware accelerator on four Altera EP3SE110 FPGA devices is capable of performing 230.4 Giga Operations per second in Sparse Matrix by Vector (SpMxV) multiplication. This architecture has successfully enabled real-time simulation of haptic interaction with a 3-dimensional FE model of 6000 nodes at an update rate of 200 Hz. Both static and dynamic linear elastic models have been successfully simulated.

In this work, a new hardware-based parallel implementation of the iterative conjugate gradient (CG) algorithm for solving such systems of equations is proposed. Fixed point computations are employed to optimize hardware resource usage and to increase parallelism. The proposed implementation adaptively adjusts to variations in the dynamic range of data operands in order to enhance computation accuracy and avoid divergence due to overflow and quantization errors.