Detecting robotic traffic at scale on online ads needs an approach that is scalable, comprehensive, precise, and can rapidly respond to changing traffic patterns. In this paper we describe SLIDR or SLIce-Level Detection of Robots, a real-time deep neural network model trained with weak supervision to identify invalid clicks on online ads. We ensure fairness across different traffic slices by formulating a convex optimization problem that allows SLIDR to achieve optimal performance on individual traffic slices with a budget on overall false positives. SLIDR has been deployed since 2021 and safeguards advertiser campaigns on Amazon against robots clicking on ads on the e-commerce site. We describe some of the important lessons learned by deploying SLIDR that include guardrails that prevent updates of anomalous models and disaster recovery mechanisms to mitigate or correct decisions made by a faulty model.

Rajat Agarwal, Varun Khurana, Karish Grover, Mukesh Mohania, Vikram Goyal. Proceedings of the 2022 Conference of the North American Chapter of the Association for Computational Linguistics: Human Language Technologies. 2022.

We propose a new task in the area of computational creativity: acrostic poem generation in English.Acrostic poems are poems that contain a hidden message; typically, the first letter of each line spells out a word or short phrase.We define the task as a generation task with multiple constraints: given an input word, 1) the initial letters of each line should spell out the provided word, 2) the poem's semantics should also relate to it, and 3) the poem should conform to a rhyming scheme.We further provide a baseline model for the task, which consists of a conditional neural language model in combination with a neural rhyming model.Since no dedicated datasets for acrostic poem generation exist, we create training data for our task by first training a separate topic prediction model on a small set of topic-annotated poems and then predicting topics for additional poems.Our experiments show that the acrostic poems generated by our baseline are received well by humans and do not lose much quality due to the additional constraints.Last, we confirm that poems generated by our model are indeed closely related to the provided prompts, and that pretraining on Wikipedia can boost performance.1 https://poemhunter.com/poem-topics 2 Extending our method to longer poems is straightforward.

The memory system is vulnerable to a number of security breaches, e.g., an attacker can interfere with program execution by disrupting values stored in memory. Modern Intel® Software Guard Extension (SGX) systems already support integrity trees to detect such malicious behavior. However, in spite of recent innovations, the bandwidth overhead of integrity+replay protection is non-trivial; state-of-the-art solutions like Synergy introduce average slowdowns of 2.3× for memory-intensive benchmarks. Prior work also implements a tree that is shared by multiple applications, thus introducing a potential side channel. In this work, we build on the Synergy and SGX baselines, and introduce three new techniques. First, we isolate each application by implementing a separate integrity tree and metadata cache for each application; this improves metadata cache efficiency and improves performance by 39%, while eliminating the potential side channel. Second, we reduce the footprint of the metadata. Synergy uses a combination of integrity and error correction metadata to provide low-overhead support for both. We share error correction metadata across multiple blocks, thus lowering its footprint (by 16×) while preventing error correction only in rare corner cases. However, we discover that shared error correction metadata, even with caching, does not improve performance. Third, we observe that thanks to its lower footprint, the error correction metadata can be embedded into the integrity tree. This reduces the metadata blocks that must be accessed to support both integrity verification and chipkill reliability. The proposed Isolated Tree with Embedded Shared Parity (ITESP) yields an overall performance improvement of 64%, relative to baseline Synergy.

Groundwater level has been declined continuously due to overexploitation and mismanagement of water resources, which leads severe problem in arid and semi-arid regions of the world. Geostatistics and Geographical information system (GIS) are the efficient technology to manage the groundwater resources. In the present study Linear regression method and Mann Kendall's test are used with GIS technology to understand the spatio-temporal behavior of Ground Water Level (GWL) in Loni and Morahi watershed of Unnao and Rae Bareli district Uttar Pradesh, India and also estimates the groundwater resources as per Groundwater Estimation Committee (CGWB, 2012) guidelines and identifies that Sareni block of Rae Bareli district and Sikandarpur Karan block of Unnao district are fall in critical category. As for the results, in both pre- and post-monsoon seasons, 61% wells showed decreasing (falling) trends.

Rise in bandwidth requirement for multimedia processing is forcing designers to use complex or wider buses in SOCs. Compression schemes using bit serial codes offer a low complexity encoding solution to such problems. However, their inherent sequential nature makes it challenging to achieve real time throughput at the decoder end. Conventionally, this problem is addressed by high frequency application processors or LUT based hardware, both of which are power hungry solutions. In this paper, we present a novel hardware architecture capable of decoding image bit planes encoded using bit serial codes, while overcoming the above limitation. It achieves parallelism without the use of any markers between bit planes. The architecture is also able to decode interleaved RAW data with minimal header information. The area of proposed architecture scales linearly with output bitrate, making it suitable for use cases involving high resolution and/or high frame rates.