Our team is developing an integrated algorithm analysis and mapping environment for migrating a dataflow representation of a signal processing algorithm into an Adaptive Computing System (ACS) consisting of FPGAs. This environment allows designers to transform signal processing algorithms into FPGA-based hardware faster, by an order of magnitude, than is currently possible. Our approach has been to focus on three areas of capability critical to the success of adaptive computing: algorithm analysis, algorithm mapping, and smart generators. These capabilities are being implemented as extensions to the Ptolemy design environment developed at the University of California, Berkeley (http://ptolemy.cecs.berkeley.edu). Our tools were used to automatically implement a Winograd DFT and a high speed linear FM detector. In both cases, our tools simulated the algorithm, selected appropriate fixed point representations, and generated the VHDL implementations. The final FPGA designs were obtained by synthesizing the VHDL and performing place and route with commercial tools.

We are developing an integrated algorithm analysis and mapping environment particularly tailored for signal processing applications on Adaptive Computing Systems (ACS). Our environment allows a designer to map signal processing algorithms to an ACS faster, by an order of magnitude, than is currently possible.

A terrain acquisition algorithm for an autonomous mobile robot to learn and model its surrounding terrain efficiently with respect to travel distance, and sensing operations is presented. It is shown that this algorithm enables a mobile robot to visit relatively few obstacle vertices to construct a map of a planar terrain occupied by polygonal obstacles. According to this algorithm, a mobile robot travels to a vertex of the obstacles only when additional terrain information can be obtained from there. The decision to move to a vertex is thus based on whether any incident edge of a vertex is missing or occluded.>