While traditionally smartphones have relied on methods such as a passcode or pattern-based authentication, biometric authentication techniques are gaining popularity. However current biometric methods are heavily dependent on various environmental factors. For example, face authentication methods depend on lighting conditions, camera shake and picture framing, while fingerprint scanning relies on finger placement. All of these variables can result in these systems becoming time-consuming for the user to use. To remedy these problems, we propose MultiLock, a passive, graded authentication system, which uses face authentication as a case study to propose a system that gives users access to their devices without requiring them to manually interact with the lock screen. Multi-Lock allows a user to categorize applications into various security bins based on their sensitivity. By doing so MultiLock can grant users access to different sensitivity applications, based on varying degrees of sureness that the device is being used by its rightful owner. Thus, allowing the device to be used even in adverse lighting conditions without hampering user experience. In our tests, MultiLock was able to grant access to users for 88% of the interactions on average, while passively running in the background. While we use face authentication as an example to demonstrate and propose MultiLock, our system can be used with any confidence based biometric system.

As memory becomes cheaper, use of it has become more prominent in computer systems. This increase in number of memory modules increases the ratio of energy consumption by memory to the overall energy consumption of a computer system. As Database Systems become more memory centric and put more pressure on the memory subsystem, managing energy consumption of main memory is becoming critical. Therefore, it is important to take advantage of all memory idle times and lower power states provided by newer memory architectures by placing memory in low power modes using application level cues. While there have been studies on CPU power consumption in Database Systems, only limited research has been done on the role of memory in Database Systems with respect to energy management. We propose Query Aware Memory Energy Management (QAMEM) where the Database System provides application level cues to the memory controller to switch to lower power states using query information and performance counters. Our results show that by using QAMEM on TPC-H workloads one can save 25% of total system energy in comparison to the state of the art memory energy management mechanisms.

Improving the energy efficiency of smartphones is critical for increasing the utility that they provide to the users. With most mobile operating systems, users are responsible for managing their phone's battery efficiency by utilizing the various settings provided by the operating system, as well as selecting energy-efficient apps. However, current app marketplaces do not provide users with information about app energy efficiency, which makes it challenging for the user to make informed decision when selecting an app. This paper presents a novel machine learning approach to estimate app energy efficiency by utilizing textual information available in the Google Play store such as an app's description, user reviews, as well as system permissions. Our detailed analysis of the resulting system shows that hardware permissions, app description, and user reviews correlate well with energy efficiency ratings. We evaluate five models that represent popular classes of machine learning algorithms in their ability to predict energy efficiency ratings. Finally, we compare our approach to gold truth ratings obtained by the actual energy profiling of the app, demonstrating that the proposed system is able to estimate an app's energy efficiency within less than 1 point on the 1-5 scale provided by the profiler, without requiring any kind of profiling.

The number of devices connected to the Internet is constantly growing. They are interacting with each other and produce data that has to be processed. The increasing data volume generated by the IoT devices is well handled by the flow based programming where data is moved through the networks of processes. Limited resources of the devices are compensated by the clouds creating the continuum. Nevertheless, to increase responsiveness in IoT or optimize the network bandwidth it might be necessary to move some processing to the fog i.e. to the devices located closer to the data sources. Execution of data flow on the number of heterogeneous IoT devices is not trivial as they offer different computational resources. In the paper, the concept of data flow transformation in order to execute parts of it, closer to the sources of data, on the devices with constrained resources is presented.

Smartphones come equipped with multiple radios for cellular data communication such as 4G LTE, 3G, and 2G, that offer different bandwidths and power profiles. 4G LTE offers the highest bandwidth and is desired by users as it offers quick response while browsing the Internet, streaming media, or utilizing numerous network aware applications available to users. However, majority of the time this high bandwidth level is unnecessary, and the bandwidth demand can be easily met by 3G radios at a reduced power level. While 2G radios demand even lower power, they do not offer adequate bandwidth to meet the demand of interactive applications; however, the 2G radio may be utilized to provide connectivity when the phone is in the standby mode. To address different demands for bandwidth, we propose GreenTouch, a system that dynamically adapts to the bandwidth demand and system state by switching between 4G LTE, 3G, and 2G with the goal of minimizing delays and maximizing energy efficiency. GreenTouch associates users' behavior to network activity through capturing and correlating user interactions with the touch display. We have used top applications on the Google play store to show the potential of GreenTouch to reduce energy consumption of the radios by 10%, on average, compared to running the applications in the standard Android. This translates to an overall energy savings of 7.5% for the entire smartphone.

Health monitoring applications using smart devices are becoming increasingly popular due to an expanding number of new devices available and growing affordability of such devices. Smartwatches provide a new way to acquire data for heart rate and activity levels via accelerometers, gyroscopes, and other builtin sensors, which can enable a full range of health applications to improve users' lives. However, continuous heart rate monitoring can significantly reduce the operating time of a smartwatch, reducing the applicability for continuous monitoring. We propose GreenMonitor to extend the operating time of a smartwatch while maintaining accuracy of heart rate monitoring by leveraging the correlation between heart rate and activity level changes indicated by the accelerometer data. Through detailed implementation and evaluation we show that GreenMonitor can save 26% energy, on average for our traces, while maintaining accurate physical activity tracking and evaluation.

Increasingly power-hungry processors have reinforced the need for aggressive power management. Dynamic voltage scaling has become a common design consideration allowing for energy efficient CPUs by matching CPU performance with the computational demand of running processes. In this paper, we propose Interaction-Aware Dynamic Voltage Scaling (IADVS), a novel fine-grained approach to managing CPU power during interactive workloads, which account for the bulk of the processing demand on modern mobile or desktop systems. IADVS is built upon a transparent, fine-grained interaction capture system. Able to track CPU usage for each user interface event, the proposed system sets the CPU performance level to the one that best matches the predicted CPU demand. Compared to the state-of-the-art approach of user-interaction-based CPU energy management, we show that IADVS improves prediction accuracy by 37%, reduces processing delays by 17%, and reduces energy consumed of the CPU by as much as 4%. The proposed design is evaluated with both a detailed trace-based simulation as well as implementation on a real system, verifying the simulation findings.

Current trends in data-intensive applications increase the demand for larger physical memory, resulting in the memory subsystem consuming a significant portion of system's energy. Furthermore, data-intensive applications heavily rely on a large buffer cache that occupies a majority of physical memory. Subsequently, we are focusing on the power management for physical memory dedicated to the buffer cache. Several techniques have been proposed to reduce energy consumption by transitioning DRAM into low-power states. However, transitions between different power states incur delays and may affect whole system performance. We take advantage of the I/O handling routines in the OS kernel to hide the delay incurred by the memory state transition so that performance degradation is minimized while maintaining high memory energy savings. Our evaluation shows that the best of the proposed mechanisms hides almost all transition latencies while only consuming 3% more energy as compared to the existing on-demand mechanism, which can expose significant delays.

Current trends in increasing storage capacity and virtualization of resources combined with the need for energy efficiency put a challenging task in front of system designers. Previous studies have suggested many approaches to reduce hard disk energy dissipation in native OS environments; however, those mechanisms do not perform well in virtual machine environments because a virtual machine (VM) and the virtual machine monitor (VMM) that runs it have different semantic contexts. This paper explores the disk I/O activities between VMM and VMs using trace driven simulation to understand the I/O behavior of the VM system. Subsequently, this paper proposes three mechanisms to address the isolation between VMM and VMs, and increase the burstiness of hard disk accesses to increase energy efficiency of a hard disk. Compared to standard shutdown mechanisms, with eight VMs the proposed mechanisms reduce disk spin-ups, increase the disk sleep time, and reduce energy consumption by 14.8% with only 0.5% increase in execution time. We implemented the proposed mechanisms in Xen and validated our simulation results.

Modern enterprises employ hundreds of workstations for daily business operations, which consume a lot of energy and thus have significant operating costs. To reduce such costs, dynamic energy management is often employed. However, dynamic energy management, especially that for disks, introduces delays when an accessed disk is in a low power state and needs to be brought into active state. In this paper, we propose system-wide alternative retrieval of data (SARD) that exploits the large number of machines in an enterprise environment to transparently retrieve binaries from other nodes, thus avoiding access delays when the local disk is in a low power mode. SARD uses a software-based approach to reduce spin-up delays while eliminating the need for major operating system changes, custom buffering, or shared memory infrastructure.

Wireless Network Interface Cards (WNICs) are part of every portable device, where efficient energy management plays a significant role in extending the device's battery life. The goal of efficient energy management is to match the performance of the WNIC to the network activity shaped by a running application. In the case of interactive applications on mobile systems, network I/O is largely driven by user interactions. Current solutions either require application modifications or lack a sufficient context of execution that is crucial in making accurate and timely predictions. This paper proposes a range of user-interaction-aware mechanisms that utilize a novel approach of monitoring a user's interaction with applications through the capture and classification of mouse events. This approach yields considerable improvements in energy savings and delay reductions of the WNIC, while significantly improving the accuracy, timeliness, and computational overhead of predictions when compared to existing state-of-the-art solutions.

A fundamental challenge in improving file system performance is to design effective block replacement algorithms to minimize buffer cache misses. Despite the well-known interactions between prefetching and caching, almost all buffer cache replacement algorithms have been proposed and studied comparatively, without taking into account file system prefetching, which exists in all modern operating systems. This paper shows that such kernel prefetching can have a significant impact on the relative performance in terms of the number of actual disk l/Os of many well-known replacement algorithms; it can not only narrow the performance gap but also change the relative performance benefits of different algorithms. Moreover, since prefetching can increase the number of blocks clustered for each disk I/O and, hence, the time to complete the I/O, the reduction in the number of disk l/Os may not translate into proportional reduction in the total I/O time. These results demonstrate the importance of buffer caching research taking file system prefetching into consideration and comparing the actual disk l/Os and the execution time under different replacement algorithms.

Reducing energy consumption has become one of the major challenges in designing future computing systems. This paper proposes a novel idea of using program counters to predict I/O activities in the operating system. It presents a complete design of program-counter access predictor (PCAP) that dynamically learns the access patterns of applications and predicts when an I/O device can be shut down to save energy. PCAP uses path-based correlation to observe a particular sequence of program counters leading to each idle period and predicts future occurrences of that idle period. PCAP differs from previously proposed shutdown predictors in its ability to: 1) correlate I/O operations to particular behavior of the applications and users, 2) carry prediction information across multiple executions of the applications, and 3) attain higher energy savings while incurring lower mispredictions. We perform an extensive evaluation study of PCAP using a detailed trace-driven simulation and an actual Linux implementation. Our results show that PCAP achieves lower average mispredictions and higher energy savings than the simple timeout scheme and the state-of-the-art learning tree scheme.

A fundamental challenge in improving the file system performance is to design effective block replacement algorithms to minimize buffer cache misses. Despite the well-known interactions between prefetching and caching, almost all buffer cache replacement algorithms have been proposed and studied comparatively without taking into account file system prefetching which exists in all modern operating systems. This paper shows that such kernel prefetching can have a significant impact on the relative performance in terms of the number of actual disk I/Os of many well-known replacement algorithms; it can not only narrow the performance gap but also change the relative performance benefits of different algorithms. These results demonstrate the importance for buffer caching research to take file system prefetching into consideration.

Reducing energy consumption has become one of the major challenges in designing future computing systems. We propose a novel idea of using program counters to predict I/O activities in the operating system. We present a complete design of program-counter access predictor (PCAP) that dynamically learns the access patterns of applications and predicts when an I/O device can be shut down to save energy. PCAP uses path-based correlation to observe a particular sequence of program counters leading to each idle period, and predicts future occurrences of that idle period. PCAP differs from previously proposed shutdown predictors in its ability to: (1) correlate I/O operations to particular behavior of the applications and users, (2) carry prediction information across multiple executions of the applications, and (3) attain better energy savings while incurring low mispredictions.

Sequential consistency (SC) is the simplest programming interface for shared-memory systems but imposes program order among all memory operations, possibly precluding high performance implementations. Release consistency (RC), however, enables the highest performance implementations but puts the burden on the programmer to specify which memory operations need to be atomic and in program order. This paper shows, for the first time, that SC implementations can perform as well as RC implementations if the hardware provides enough support for speculation. Both SC and RC implementations rely on reordering and overlapping memory operations for high performance. To enforce order when necessary, an RC implementation uses software guarantees, whereas an SC implementation relies on hardware speculation. Our SC implementation, called SC++, closes the performance gap because: (1) the hardware allows not just loads, as some current SC implementations do, but also stores to bypass each other speculatively to hide remote latencies, (2) the hardware provides large speculative state for not just processor, as previously proposed, but also memory to allow out-of- order memory operations, (3) the support for hardware speculation does not add excessive overheads to processor pipeline critical paths, and (4) well- behaved applications incur infrequent rollbacks of speculative execution. Using simulation, we show that SC++ achieves an RC implementation's performance in all the six applications we studied