The use of the column-rank of the sensitivity matrix as a testability measure for parametric faults in linear analog circuits was pioneered by Saeks in 1970s, and later re-discovered by several others.Its practical use has been, however, limited by how it can be calculated.Numerical algorithms suffer from inevitable round-off errors, while classical symbolic techniques can only handle very small circuits.In this paper , an innovative and efficient graph based symbolic analysis approach, called Determinant Decision Diagrams, is applied to testability measurement and selection for optimum test vectors.The new approach is promising in testability analysis of much larger analog circuits.

A graph representation called Multi-Terminal Determinant Decision Diagrams (MTDDD's) is proposed for the semi-symbolic transfer functions of analog integrated circuits. With multiple numeric terminals (instead of only terminal 1 and terminal 0 in Determinant Decision Diagrams -- DDD's), MTDDD's can describe naturally numeric coefficients that arise from semi-symbolic analysis, where some circuit parameters are considered symbols and the others are given as numeric values. Similar to DDD's, MTDDD's are capable of representing a huge number of symbolic/semi-symbolic product terms in a compact manner. An efficient DDD-based algorithm is described to construct MTDDD's. Experimental results have demonstrated that semi-symbolic transfer functions for practical analog circuits like µA741 can be generated in less than a minute on a Pentium-II 450MHz PC.