Demo Data from SIGIR 2026 / reviewers in the wild / expert
Aleksey Pesterev
dblp:96/1003 · also Alex Pesterev
· DBLP profile ↗
7ranked-venue papers
2as first author
0since 2021 · last 2012
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 3 · 2 first-authorSoftware engineering, systems software and programming languages · 2Computer networks · 1Applied, interdisciplinary, general and emerging computing · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
5 papers |
Performance modeling and evaluation · 38% Memory systems · 24% Processor architecture and microarchitecture · 22% | |
| Software engineering, system software, and programming languages
3 papers |
Operating systems · 100% | |
| Computer networks
2 papers |
Internet of things and sensor networks · 74% Transport protocols and congestion control · 26% |
Topics — the 11 heaviest of 13, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Operating systems
network stack |
0.1 | 1 | 2012 | Improving network connection locality on multicore systems · EuroSys 2012 |
Processor architecture and microarchitecture
chip multiprocessor |
0.1 | 1 | 2012 | Improving network connection locality on multicore systems · EuroSys 2012 |
Performance modeling and evaluation › parallel performance evaluation
multicore scalability |
0.1 | 2 | 2010 | An Analysis of Linux Scalability to Many Cores · OSDI 2010 Corey: An Operating System for Many Cores · OSDI 2008 |
Memory systems
cache |
0.1 | 1 | 2010 | Locating cache performance bottlenecks using data profiling · EuroSys 2010 |
Performance modeling and evaluation
workload characterization |
0.1 | 1 | 2010 | Locating cache performance bottlenecks using data profiling · EuroSys 2010 |
Storage systems
content-addressable storage |
0.1 | 1 | 2008 | Fast, Inexpensive Content-Addressed Storage in Foundation · USENIX ATC 2008 |
Internet of things and sensor networks › wireless sensor network › sensor network architecture
tiered sensor networks |
0.1 | 1 | 2006 | Capturing high-frequency phenomena using a bandwidth-limited sensor network · SenSys 2006 |
Transport protocols and congestion control
transport protocols |
0.0 | 1 | 2012 | Improving network connection locality on multicore systems · EuroSys 2012 |
Memory systems
cache coherence |
0.0 | 1 | 2012 | Improving network connection locality on multicore systems · EuroSys 2012 |
Operating systems › kernel › kernel design
kernel scalability |
0.0 | 1 | 2010 | An Analysis of Linux Scalability to Many Cores · OSDI 2010 |
Storage systems
file systems |
0.0 | 1 | 2008 | Fast, Inexpensive Content-Addressed Storage in Foundation · USENIX ATC 2008 |
Methods — techniques the papers use, named apart from their topics
execution profiling · 0.1data flow graph analysis · 0.1content addressing · 0.1signal processing control · 0.1local filtering · 0.1cross-platform library · 0.1
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2012 | Improving network connection locality on multicore systemsabstractIncoming and outgoing processing for a given TCP connection often execute on different cores: an incoming packet is typically processed on the core that receives the interrupt, while outgoing data processing occurs on the core running the relevant user code. As a result, accesses to read/write connection state (such as TCP control blocks) often involve cache invalidations and data movement between cores' caches. These can take hundreds of processor cycles, enough to significantly reduce performance. Aleksey Pesterev, Jacob Strauss, Nickolai Zeldovich, Robert T. Morris |
EuroSys | 1 |
| 2010 | Locating cache performance bottlenecks using data profilingabstractEffective use of CPU data caches is critical to good performance, but poor cache use patterns are often hard to spot using existing execution profiling tools. Typical profilers attribute costs to specific code locations. The costs due to frequent cache misses on a given piece of data, however, may be spread over instructions throughout the application. The resulting individually small costs at a large number of instructions can easily appear insignificant in a code profiler's output. DProf helps programmers understand cache miss costs by attributing misses to data types instead of code. Associating cache misses with data helps programmers locate data structures that experience misses in many places in the application's code. DProf introduces a number of new views of cache miss data, including a data profile, which reports the data types with the most cache misses, and a data flow graph, which summarizes how objects of a given type are accessed throughout their lifetime, and which accesses incur expensive cross-CPU cache loads. We present two case studies of using DProf to find and fix cache performance bottlenecks in Linux. The improvements provide a 16-57% throughput improvement on a range of memcached and Apache workloads. Aleksey Pesterev, Nickolai Zeldovich, Robert T. Morris |
EuroSys | 1 |
| 2010 | An Analysis of Linux Scalability to Many Cores
Silas Boyd-Wickizer, Austin T. Clements, Yandong Mao, Aleksey Pesterev, M. Frans Kaashoek, Robert Morris 0005, Nickolai Zeldovich |
OSDI | 4 |
| 2008 | Corey: An Operating System for Many Cores
Silas Boyd-Wickizer, Haibo Chen 0001, Rong Chen 0001, Yandong Mao, M. Frans Kaashoek, Robert Morris 0005, Aleksey Pesterev, Lex Stein, Ming Wu 0007, Yue-hua Dai, Zheng Zhang 0001 |
OSDI | 7 |
| 2008 | Fast, Inexpensive Content-Addressed Storage in Foundation
Sean C. Rhea, Russ Cox, Aleksey Pesterev |
USENIX ATC | 3 |
| 2007 | Bi-Fi: An Embedded Sensor/System Architecture for Remote Biological MonitoringabstractWireless-enabled processor modules intended for communicating low-frequency phenomena (i.e., temperature, humidity, and ambient light) have been enabled to acquire and transmit multiple biological signals in real time, which has been achieved by using computationally efficient data acquisition, filtering, and compression algorithms, and interfacing the modules with biological interface hardware. The sensor modules can acquire and transmit raw biological signals at a rate of 32 kb/s, which is near the hardware limit of the modules. Furthermore, onboard signal processing enables one channel, sampled at a rate of 4000 samples/s at 12-bit resolution, to be compressed via adaptive differential-pulse-code modulation (ADPCM) and transmitted in real time. In addition, the sensors can be configured to filter and transmit individual time-referenced "spike" waveforms, or to transmit the spike height and width for alleviating network traffic and increasing battery life. The system is capable of acquiring eight channels of analog signals as well as data via an asynchronous serial connection. A back-end server archives the biological data received via networked gateway sensors, and hosts them to a client application that enables users to browse recorded data. The system also acquires, filters, and transmits oxygen saturation and pulse rate via a commercial-off-the-shelf interface board. The system architecture can be configured for performing real-time nonobtrusive biological monitoring of humans or rodents. This paper demonstrates that low-power, computational, and bandwidth-constrained wireless-enabled platforms can indeed be leveraged for wireless biosignal monitoring. Shahin Farshchi, Aleksey Pesterev, Paul Nuyujukian, István Módy, Jack W. Judy |
IEEE Trans. Inf. Technol. Biomed. | 2 |
| 2006 | Capturing high-frequency phenomena using a bandwidth-limited sensor networkabstractSmall-form-factor, low-power wireless sensors—motes—are convenient to deploy, but lack the bandwidth to capture and transmit raw high-frequency data, such as human voices or neural signals, in real time. Local filtering can help, but we show that the right filter settings depend on changing ambient conditions and network effects such as congestion, which makes them dynamic and unpredictable. Mote collection systems for high-frequency data must support iteratively-tuned, deployment-specific filter settings as well as fast sampling.VANGO, our software system for high-frequency data collection, achieves these goals via integrated processing across network tiers. Bandwidth-limited sensor nodes reduce data in network but rely on microservers, which have greater computational capabilities and a wider scope of observation, to plan how. VANGO provides a cross-platform library for data transformation, measurement, and classification; a fast and low-jitter data acquisition system for motes; and a mechanism to control mote and microserver signal processing. With VANGO we have developed new applications: the first acoustic collection system for motes responsive to changing environmental conditions and user interests, and the first neural spike acquisition application capable of supporting a network of nodes. Ben Greenstein, Christopher Mar, Aleksey Pesterev, Shahin Farshchi, Eddie Kohler, Jack W. Judy, Deborah Estrin |
SenSys | 3 |