Demonstration venue · read-only. Every page can be browsed; the buttons that would change it are switched off. Create an account to run TaxoReview on your own data. A simulation from public publication records: the people listed were not invited and did not agree to review.
? Tutorial for this page

Helmut Emmelmann

dblp:99/1275 · DBLP profile ↗
← Back
2ranked-venue papers
2as first author
0since 2021 · last 1992
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Software engineering, systems software and programming languages · 2 · 2 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Software engineering, system software, and programming languages
1 paper
Compilers and program optimization · 100%

Topics — the 4 heaviest of 4, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Compilers and program optimization
code generation
0.011989
BEG - A Generator for Efficient Back Ends · PLDI 1989
Compilers and program optimization › code generation
instruction selection
0.011989
BEG - A Generator for Efficient Back Ends · PLDI 1989
Compilers and program optimization
register allocation
0.011989
BEG - A Generator for Efficient Back Ends · PLDI 1989
Compilers and program optimization
compiler back end
0.011989
BEG - A Generator for Efficient Back Ends · PLDI 1989

Methods — techniques the papers use, named apart from their topics

tree pattern matching · 0.0declarative specification · 0.0bottom-up pattern matching · 0.0
YearPublicationVenuePosition
1992 Testing Completeness of Code Selector Specifications
Helmut Emmelmann
CC1
1989 BEG - A Generator for Efficient Back Ends
abstract
This paper describes a system that generates compiler back ends from a strictly declarative specification of the code generation process. The generated back ends use tree pattern matching for code selection. Two methods for register allocation supporting a wide range of target architectures are provided. A general bottom-up pattern matching method avoids problems that occurred with previous systems using LR-parsing. The performance of compilers using generated back ends is comparable to very fast production compilers. Some figures are given about the results of using the system to generate the back end of a Modula-2 compiler.
Helmut Emmelmann, Friedrich-Wilhelm Schröer, Rudolf Landwehr
PLDI1