Demo Data from SIGIR 2026 / reviewers in the wild / expert
Richard D. Jenks
dblp:99/6328
· DBLP profile ↗
3ranked-venue papers
1as first author
0since 2021 · last 1994
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 1Software engineering, systems software and programming languages · 1Theory of computation · 1 · 1 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Software engineering, system software, and programming languages
1 paper |
Programming languages and type systems · 100% | |
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Processor architecture and microarchitecture · 100% |
Topics — the 4 heaviest of 4, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Programming languages and type systems › type systems
coercion |
0.0 | 1 | 1987 | The type inference and coercion facilities in the scratchpad II interpreter · PLDI 1987 |
Programming languages and type systems
type inference |
0.0 | 1 | 1987 | The type inference and coercion facilities in the scratchpad II interpreter · PLDI 1987 |
Processor architecture and microarchitecture
instruction set architecture |
0.0 | 1 | 1964 | The CSX-l Computer · IEEE Trans. Electron. Comput. 1964 |
Processor architecture and microarchitecture › register file
register file design |
0.0 | 1 | 1964 | The CSX-l Computer · IEEE Trans. Electron. Comput. 1964 |
Methods — techniques the papers use, named apart from their topics
abstract datatype programming · 0.0instruction repertoire design · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 1994 | How to Make AXIOM into a ScratchpadabstractArticle Free Access Share on How to make AXIOM into a scratchpad Authors: Richard D. Jenks IBM Thomas J. Watson Research Center, P.O. Box 218, Yorktown Heights, NY IBM Thomas J. Watson Research Center, P.O. Box 218, Yorktown Heights, NYView Profile , Barry M. Trager IBM Thomas J. Watson Research Center, P.O. Box 218, Yorktown Heights, NY IBM Thomas J. Watson Research Center, P.O. Box 218, Yorktown Heights, NYView Profile Authors Info & Claims ISSAC '94: Proceedings of the international symposium on Symbolic and algebraic computationAugust 1994 Pages 32–40https://doi.org/10.1145/190347.190357Published:01 August 1994Publication History 3citation264DownloadsMetricsTotal Citations3Total Downloads264Last 12 Months6Last 6 weeks1 Get Citation AlertsNew Citation Alert added!This alert has been successfully added and will be sent to:You will be notified whenever a record that you have chosen has been cited.To manage your alert preferences, click on the button below.Manage my AlertsNew Citation Alert!Please log in to your account Save to BinderSave to BinderCreate a New BinderNameCancelCreateExport CitationPublisher SiteeReaderPDF Richard D. Jenks, Barry M. Trager |
ISSAC | 1 |
| 1987 | The type inference and coercion facilities in the scratchpad II interpreterabstractThe Scratchpad II system is an abstract datatype programming language, a compiler for the language, a library of packages of polymorphic functions and parametrized abstract datatypes, and an interpreter that provides sophisticated type inference and coercion facilities. Although originally designed for the implementation of symbolic mathematical algorithms, Scratchpad II is a general purpose programming language. This paper discusses aspects of the implementation of the interpreter and how it attempts to provide a user friendly and relatively weakly typed front end for the strongly typed programming language. Robert S. Sutor, Richard D. Jenks |
PLDI | 2 |
| 1964 | The CSX-l ComputerabstractA brief description of the logical structure and the instruction repertoire of a short word length (16 bits) computer is given. The unorthodox features which are discussed are 1) a variable-length addressing procedure, 2) a common multi-accumulator and index register structure, and 3) the identical processing of data and addresses. R. M. Brown, Richard D. Jenks, J. E. Stifle, R. L. Trogdon |
IEEE Trans. Electron. Comput. | 2 |