An important challenge in industrial metrology is to provide rapid measurement of critical 3D internal object geometry for either inspecting high volume parts or controlling a machining process. Existing metrological techniques are typically too slow to meet this need or can not measure small features with high precision. In this paper, we present a new method that achieves fast, accurate, internal 3D geometry measurement based on 3D reconstruction from a few X-ray views of a part. Our approach utilizes an accurate camera model for the X-ray sensor, calibration using in situ ground truth and geometry-guided X-ray feature extraction to achieve this goal and has been fully implemented in a prototype 3D measurement system. We describe a novel application of the system to CAD-based verification of drilled hole positioning. Experimental results are given to illustrate the precision of the system and 3D measurement on real industrial parts.

This paper presents a new methodology for camera calibration of stereo X-ray projections. The image acquisition systems typically used in nondestructive evaluation result in views that are orthographic along one image axis and perspective along the other. A camera model for this sensing geometry, called the linear pushbroom model, is described. Four methods of calibration, which make different assumptions about what is known about the camera parameters, are presented and compared.

An important challenge in industrial metrology is to provide rapid measurement of critical 3D internal object geometry for either inspecting high volume parts or controlling a machining process. Existing metrological techniques are typically too slow to meet this need or can not measure small features with high precision. In this paper, we present an X-ray stereo system which aims to achieve fast 3D geometry measurement from a few X-ray views of a part. We describe the key algorithms in our system and a novel application of it to CAD-based verification of drilled hole positioning. Experimental results are given to illustrate the accuracy of the current system and inspection on a real part.

Signal flow direction information has been used to improve the accuracy and performance of many CAD tools. Hence deriving this information correctly and efficiently is an important and useful task. In this paper, an integrated system for deriving signal flow direction information in CMOS circuits is presented. This system consists of two subsystems: structure-based and rule-based. In the structure-based subsystem, a new graph-theoretic algorithm is used. The direction assignment problem is modeled as a two-paths problem on an undirected graph, called the global source target graph (GST-graph). The GST-graph is decomposed into split components by a linear time algorithm and the direction information of most edges in each split component can be derived by another linear time algorithm. If all transistors in a circuit are structurally unidirectional then their directions will be determined in this subsystem. Those transistors, if any, whose directions cannot be determined by this subsystem will be dealt with in the rule-based subsystem. A new set of rules including logic implication and precharge node driven rules have been developed. By considering circuit semantics, some difficult circuits such as a pass transistor based XOR gate, a six-transistor memory cell, barrel shifters, and precharge logic circuits can be processed. Experimental results show the accuracy and efficiency of this integrated system.

A new method is given for image rectification, the process of resampling pairs of stereo images taken from widely differing viewpoints in order to produce a pair of matched epipolar projections. These are projections in which the epipolar lines run parallel with the x-axis and disparities between the images are in the x-direction only. The method is based on an examination of the essential matrix of Longuet-Higgins (1981), which describes the epipolar geometry of the image pair. The approach taken is consistent with that advocated by O. Faugeras (1992) of avoiding camera calibration. A matrix called the epipolar transformation matrix is defined. It is used to determine a pair of 2-D projective transforms to be applied to the two images in order to match the epipolar lines. The advantages include the simplicity of the 2-D projective transformation, which allows very fast resampling, as well as subsequent simplification in identifying matched points and in scene reconstruction.>

The problem of computing placement of points in 3-D space, given two uncalibrated perspective views, is considered. The main theorem shows that the placement of the points is determined only up to an arbitrary projective transformation of 3-space. Given additional ground control points, however, the location of the points and the camera parameters may be determined. The method is linear and noniterative, whereas previously known methods for solving the camera calibration and placement problem to take proper account of both ground-control points and image correspondences are unsatisfactory in requiring either iterative methods or model restrictions. As a result of the main theorem, it is possible to determine projective invariants of 3-D geometric configurations from two perspective views.>

Signal flow directions of MOS transistors have been used in many CAD tools. A graph theoretic approach is presented for determining these directions. A MOS circuit is represented using several undirected graphs called ST-graphs. The direction assignment problem is modeled as a two paths problem in each ST-graph. Necessary and sufficient conditions under which all edges in an ST-graph are unidirectional are derived. A linear time algorithm is presented that assigns directions to all edges in an ST-graph if they all unidirectional. If bidirectional edges exist, the algorithm assigns directions to most edges in the ST-graph, and the remaining edges are resolved by a sequence of additional algorithms. Experimental results validate the performance benefits of this approach.>

An efficient partial scan technique called Ballast (balanced structure scant test) is presented. Scan path storage elements (SPSEs) are selected such that the remainder of the circuit has certain desirable testability properties. A complete test set is obtained using combinatorial automatic test pattern generation (ATPG). Some SPSEs may need to be provided with a HOLD mode; their number is minimized by ordering the registers in the scan path and formatting the test patterns appropriately. This methodology leads to a low area overhead and allows 100% coverage of irredundant faults.>

The problem of recovering multipipelines in the presence of faulty stages is addressed. The stages are assumed to be organized in rows and columns. The pipeline stages are alternated with reconfiguring circuitry which is used for bypassing the faulty stages. The pipelines are configured by programming the switches in a distributed manner using fault information available locally. The configuration algorithm is optimal in the sense that it recovers the maximum number of pipelines under any fault pattern. Probabilistic bounds on the delay (the number of bypassed faulty stages) and yield (the number of nonfaulty pipelines recovered) are derived. It is shown that the maximum signal delay in any of the pipelines is O(log m), where m is the initial number of pipelines. A constant fraction of these pipelines can be recovered with the scheme, as opposed to an exponentially decreasing number when no reconfiguration is used. The reconfiguration scheme can also be used to provide fault-tolerant buses on a wafer.>

Cbase 1.0 is a multilayered system which provides a common repository of both VLSI objects and their associated operations, a tool interface for writing new applications, and a user interface for invoking applications or viewing objects in the database. Preliminary experience indicates that using an object-oriented database provides features such as specialization/generalization, property and operation inheritance, and polymorphism among object types which are useful for modeling the hierarchical nature and multiple views of a circuit. >