Demo Data from VLDB 2026 / reviewers in the wild / expert
Yoshihisa Kojima
dblp:80/5447
· DBLP profile ↗
5ranked-venue papers
1as first author
0since 2021 · last 2013
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 3 · 1 first-authorSoftware engineering, systems software and programming languages · 1Graphics, computer vision, multimedia, augmented reality and games · 1Human-computer interaction and ubiquitous computing · 1Theory of computation · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Electronic design automation · 75% Parallel and multicore computing · 25% | |
| Computer graphics and multimedia
1 paper |
Virtual and augmented reality · 100% | |
| Human-computer interaction and pervasive computing
1 paper |
Accessibility and assistive technology · 100% |
Topics — the 5 heaviest of 6, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Virtual and augmented reality
navigation |
0.2 | 1 | 2013 | Evaluation of navigation skill of elderly people using the cycling wheel chair in a virtual environment · VR 2013 |
Parallel and multicore computing › parallelizing compiler
dependence analysis |
0.1 | 1 | 2009 | Debugging from high level down to gate level · DAC 2009 |
Electronic design automation › design methodology
design refinement |
0.1 | 1 | 2009 | Debugging from high level down to gate level · DAC 2009 |
Electronic design automation
hardware verification and test |
0.1 | 1 | 2009 | Debugging from high level down to gate level · DAC 2009 |
Electronic design automation
high-level synthesis |
0.1 | 1 | 2009 | Debugging from high level down to gate level · DAC 2009 |
Methods — techniques the papers use, named apart from their topics
homing vector analysis · 0.3static tracing · 0.1graph representation · 0.1dynamic tracing · 0.1
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2013 | Evaluation of navigation skill of elderly people using the cycling wheel chair in a virtual environmentabstractA cycling wheel chair (CWC) is a pedal-driven wheelchair developed as a personal transportation device for patients with hemiplegia after cerebral stroke. The CWC enables the patient to travel much faster than an ordinary wheel chair and is effective for prevention of disuse syndrome in lower limbs. However, the patients often have impairment of cognitive function as well as motor function. It is dangerous for such patients to ride on the CWC on outdoor roads. To cope with this problem, a virtual reality system for the CWC named “Virtual CWC” was developed. The Virtual CWC can provide safe and space-saving training and test environment for the patients. In the present study, a new scenario of the Virtual CWC has been developed to test the patient's cognitive function with respect to navigation as well as driving skills. The normal subjects' “homing vectors” obtained after riding on the Virtual CWC in three kinds of routes were analyzed, and compared between a young group (26 normal subjects; age 23.9 ± 2.5) and an elderly group (14 normal subjects; age 69.9 ± 4.1). As a result, the effect of cooperation between pedaling and steering could be found in the angular error of homing vectors in the case of the elderly group. Norihiro Sugita, Makoto Yoshizawa, Yoshihisa Kojima, Akira Tanaka, Makoto Abe, Noriyasu Homma, Toshitsugu Kikuchi, Kazunori Seki, Yasunobu Handa |
VR | 3 |
| 2009 | Debugging from high level down to gate levelabstractC-based hardware designs are now accepted as means to increase design productivity. Starting with rather algorithmic design descriptions, incremental refinements are applied to generate high-level synhesizable descriptions which are further processed by high-level and logic synthesis tools. C-based system level design descriptions, such as in SpecC [?] and SystemC [?], can give concise and global views on the behaviors of the designs as well as structures, and various types of dependencies, such as control, data, concurrency, and others, can be extracted quickly. These dependencies can be the bases for efficient and effective debugging for all levels of design descriptions. In this paper, graph representations for various dependencies which are extracted from C-based descriptions are introduced. Then techniques on their uses for debugging in various design levels are discussed. We present static and dynamic tracing methods for dependence analysis as well as techniques that try to establish mapping between implementations and C-based design descriptions. Masahiro Fujita 0004, Yoshihisa Kojima, Amir Masoud Gharehbaghi |
DAC | 2 |
| 2008 | An Interactive Verification and Debugging Environment by Concrete/Symbolic Simulations for System-Level DesignsabstractThis paper proposes a new approach for state space exploration on model checking of system-level designs, named "user-driven Breadth-First Search,'' and an interactive verification and debugging environment for its realization. Our approach aims to overcome the limited width of the traditional concrete simulation (Depth-First Search) and the limited depth of symbolic simulation (Breadth-First Search), by combining both of them with the users' guidance. Our case study demonstrates that our approach can detect one of the bugs, which were difficult to be found due to too wide input space for concrete simulation, and due to too deep iteration cycles for symbolic simulation. Yoshihisa Kojima, Tasuku Nishihara, Takeshi Matsumoto |
ATS | 1 |
| 2003 | Engineering Changes in Field Modifiable Architectures
Hiroshi Saito, Kenshu Seto, Yoshihisa Kojima, Satoshi Komatsu |
MEMOCODE | 3 |
| 2002 | Field modifiable architecture with FPGAs and its design methodologyabstractIn the age of highly integrated system LSIs, the problem of design methodologies with short time-to-market and higher re-programmability after the chip fabrications has acquired great importance. Although a pure FPGA system is one of the solutions, it cannot give sufficient performance in many real-time applications due to its lower performance and higher power dissipation compared to ASICs. Instead, a hardware/software co-design approach can give best design solutions in terms of such design criteria. In this paper, we introduce a new VLSI architecture called Field Modifiable Architecture (FMA) and its design methodology. Experimental results confirm that our architecture can achieve significant performance improvement in terms of execution cycles. Satoshi Komatsu, Yoshihisa Kojima, Hiroshi Saito, Kenshu Seto |
FPT | 2 |