Demonstration venue · read-only. Every page can be browsed; the buttons that would change it are switched off. Create an account to run TaxoReview on your own data. A simulation from public publication records: the people listed were not invited and did not agree to review.
? Tutorial for this page

Scott D. Carson

dblp:00/2841 · DBLP profile ↗
← Back
6ranked-venue papers
4as first author
0since 2021 · last 1995
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Software engineering, systems software and programming languages · 3 · 2 first-authorDatabases, data management, data science and information retrieval · 2 · 2 first-authorTheory of computation · 2 · 2 first-authorSystems, architecture and hardware · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
2 papers
Processor architecture and microarchitecture · 57% Memory systems · 38% Performance modeling and evaluation · 6%
Software engineering, system software, and programming languages
2 papers
Concurrent programming · 82% Compilers and program optimization · 18%

Topics — the 9 heaviest of 11, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Processor architecture and microarchitecture
instruction set architecture
0.011995
Generalized Multiway Branch Unit for VLIW Microprocessors · IEEE Trans. Parallel Distributed Syst. 1995
Processor architecture and microarchitecture › instruction-level parallelism › VLIW
VLIW processor
0.011995
Generalized Multiway Branch Unit for VLIW Microprocessors · IEEE Trans. Parallel Distributed Syst. 1995
Memory systems › cache management › storage caching › caching policy
cache write policy
0.011992
Analysis of the Periodic Update Write Policy For Disk Cache · IEEE Trans. Software Eng. 1992
Memory systems › cache management › storage caching
disk cache
0.011992
Analysis of the Periodic Update Write Policy For Disk Cache · IEEE Trans. Software Eng. 1992
Concurrent programming
deadlock detection
0.011987
The Geometry of Semaphore Programs · ACM Trans. Program. Lang. Syst. 1987
Concurrent programming
synchronization
0.011987
The Geometry of Semaphore Programs · ACM Trans. Program. Lang. Syst. 1987
Concurrent programming › concurrency bugs
synchronization errors
0.011987
The Geometry of Semaphore Programs · ACM Trans. Program. Lang. Syst. 1987
Performance modeling and evaluation
queueing models
0.011992
Analysis of the Periodic Update Write Policy For Disk Cache · IEEE Trans. Software Eng. 1992
Automated reasoning and model checking › program verification
verification of concurrent systems
0.011987
The Geometry of Semaphore Programs · ACM Trans. Program. Lang. Syst. 1987

Methods — techniques the papers use, named apart from their topics

target selection unit · 0.0condition tree representation · 0.0queueing analysis · 0.0disk scheduling · 0.0geometric model · 0.0
YearPublicationVenuePosition
1995 Generalized Multiway Branch Unit for VLIW Microprocessors
abstract
VLIW processors use multiway branch instructions to achieve high-speed, parallel evaluation of control structures. This paper introduces a new multiway branch mechanism that allows constant-time branch-target resolution based on an arbitrary condition tree. The unique feature of this mechanism is its target selection unit, which yields a branch-target based on a set of condition bit values and a condition tree description. A representation of condition trees that results in a compact target selection unit is described, and the logic diagram of a target selection unit that provides a four-way branching is shown. Our experimental results on nontrivial integer benchmarks indicate that the proposed multiway branch unit can improve the performance of VLIW machines substantially (i.e., as much as a geometric mean of 35%), compared to using the conventional two-way branching.>
Soo-Mook Moon, Scott D. Carson
IEEE Trans. Parallel Distributed Syst.2
1992 A Discrete-State Model of the Two-Headed Disk
Scott D. Carson, Vivek Nirkhe, Paul Vongsathorn
Inf. Process. Lett.1
1992 Analysis of the Periodic Update Write Policy For Disk Cache
abstract
A disk cache is typically used in file systems to reduce average access time for data storage and retrieval. The 'periodic update' write policy, widely used in existing computer systems, is one in which dirty cache blocks are written to a disk on a periodic basis. The average response time for disk read requests when the periodic update write policy is used is determined. Read and write load, cache-hit ratio, and the disk scheduler's ability to reduce service time under load are incorporated in the analysis, leading to design criteria that can be used to decide among competing cache write policies. The main conclusion is that the bulk arrivals generated by the periodic update policy cause a traffic jam effect which results in severely degraded service. Effective use of the disk cache and disk scheduling can alleviate this problem, but only under a narrow range of operating conditions. Based on this conclusion, alternate write packages that retain the periodic update policy's advantages and provide uniformly better service are proposed.>
Scott D. Carson, Sanjeev Setia
IEEE Trans. Software Eng.1
1990 A System for Adaptive Disk Rearrangement
abstract
Abstract The speed of mass storage devices has a significant impact on the performance of computer systems. The speed that is realized on a particular mass storage device, however, depends heavily on how that device is used. Operating systems, such as the UNIX UNIX is a trademark of AT&T Bell Laboratories. time‐sharing system, use layout policies and head‐scheduling disciplines that are designed to work well on average. Numerous studies have shown that disk access patterns exhibit a high degree of locality. Further, studies have shown that these access patterns do not necessarily correspond to the usage patterns anticipated by the system's designers, and that head scheduling is used infrequently enough that it has limited effect. This paper describes the design, implementation, and use of a disk subsystem that adaptively corrects the disparity between expected access patterns and actual access patterns by reorganizing disk data. A representative experiment that demonstrates the resulting performance improvement is presented.
Paul Vongsathorn, Scott D. Carson
Softw. Pract. Exp.2
1989 Error Bounds on Disk Arrangement Using Frequency Information
Scott D. Carson, Paul Vongsathorn
Inf. Process. Lett.1
1987 The Geometry of Semaphore Programs
abstract
Synchronization errors in concurrent programs are notoriously difficult to find and correct. Deadlock, partial deadlock, and unsafeness are conditions that constitute such errors. A model of concurrent semaphore programs based on multidimensional, solid geometry is presented. While previously reported geometric models are restricted to two-process mutual exclusion problems, the model described here applies to a broader class of synchronization problems. The model is shown to be exact for systems composed of an arbitrary, yet fixed number of concurrent processes, each consisting of a straight line sequence of arbitrarily ordered semaphore operations.
Scott D. Carson, Paul F. Reynolds Jr.
ACM Trans. Program. Lang. Syst.1