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Christophe Laurent

dblp:00/5093 · DBLP profile ↗
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7ranked-venue papers
2as first author
0since 2021 · last 2018
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Graphics, computer vision, multimedia, augmented reality and games · 3 · 2 first-authorArtificial intelligence and machine learning · 2Systems, architecture and hardware · 1Computer networks · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Integrated circuit design · 56% Hardware reliability and fault tolerance · 36% Memory systems · 8%

Topics — the 5 heaviest of 5, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Hardware reliability and fault tolerance › error correction
error correction decoder
0.212016
Fast Decoding ECC for Future Memories · IEEE J. Sel. Areas Commun. 2016
Integrated circuit design
finite field arithmetic
0.212016
Fast Decoding ECC for Future Memories · IEEE J. Sel. Areas Commun. 2016
Integrated circuit design › digital logic
logic gate
0.212016
Fast Decoding ECC for Future Memories · IEEE J. Sel. Areas Commun. 2016
Hardware reliability and fault tolerance
error correction
0.112016
Fast Decoding ECC for Future Memories · IEEE J. Sel. Areas Commun. 2016
Memory systems › non-volatile memory
storage class memory
0.112016
Fast Decoding ECC for Future Memories · IEEE J. Sel. Areas Commun. 2016

Methods — techniques the papers use, named apart from their topics

parallel root search · 0.2combinatorial logic design · 0.2
YearPublicationVenuePosition
2018 Ultra-Fast Error Correction and Detection for Low-Latency Storage Applications with Emerging Memories
abstract
Emerging memory technologies (like PCM, MRAM and 3D XPoint) can make data storage as fast as the rest of the system. But to cope with the reliability targets of storage applications, error correcting codes (ECCs) able to correct many errors might be needed anyway. Hierarchical codes, ECCs enabling two levels of correction, can be good candidates to satisfy these reliability targets, without impacting (on average) the low-latency characteristics of these technologies. In particular, an Ultra-Fast (UF) ECC can be used as first trial as long as it is able to flag its failures with high probability and low latency. In this paper we design an UF-ECC able to produce a check for incorrect decoding with probability lower than the typical target uncorrectable bit-error rate (UBER) of storage applications (e.g. 1e-15) and with a latency comparable with the UF-ECC correction process.
Marco Ferrari 0001, Paolo Amato, Christophe Laurent, Marco Sforzin, Luca Barletta, Sandro Bellini
ISCAS3
2016 Fast Decoding ECC for Future Memories
abstract
High-performance storage class memories could benefit from a fast decoding error correcting code (ECC), able to correct a few errors in just a few nanoseconds. The class of BCH codes provides excellent candidates to play this role. The low latency requirement prevents adopting iterative or sequential processes in the encoding and decoding phases-as traditionally done for storage application based on Flash NAND technology. Therefore, we propose an architecture for fast decoding of double and triple ECCs. In our architecture, any time-consuming iterative computation is eliminated, and the most complex evaluations are isolated and carried in parallel with the other terms, to avoid bottlenecks in the decoder. In particular, the error locator polynomial is computed by a combinatorial logic, and its roots are searched by testing all the bits simultaneously. Here, we describe a gate-level design of these architectures. We also give an in-depth analysis of hardware-oriented implementations of finite field operations, and of bases for element representation.
Paolo Amato, Sandro Bellini, Marco Ferrari 0001, Christophe Laurent, Marco Sforzin, Alessandro Tomasoni
IEEE J. Sel. Areas Commun.4
2008 Fast-Learning Adaptive-Subspace Self-Organizing Map: An Application to Saliency-Based Invariant Image Feature Construction
abstract
The adaptive-subspace self-organizing map (ASSOM) is useful for invariant feature generation and visualization. However, the learning procedure of the ASSOM is slow. In this paper, two fast implementations of the ASSOM are proposed to boost ASSOM learning based on insightful discussions of the basis rotation operator of ASSOM. We investigate the objective function approximately maximized by the classical rotation operator. We then explore a sequence of two schemes to apply the proposed ASSOM implementations to saliency-based invariant feature construction for image classification. In the first scheme, a cumulative activity map computed from a single ASSOM is used as descriptor of the input image. In the second scheme, we use one ASSOM for each image category and a joint cumulative activity map is calculated as the descriptor. Both schemes are evaluated on a subset of the Corel photo database with ten classes. The multi-ASSOM scheme is favored. It is also applied to adult image filtering and shows promising results.
Huicheng Zheng, Grégoire Lefebvre, Christophe Laurent
IEEE Trans. Neural Networks3
2006 On the Basis Updating Rule of Adaptive-Subspace Self-Organizing Map (ASSOM)
Huicheng Zheng, Christophe Laurent, Grégoire Lefebvre
ICANN (1)2
2006 In depth analysis and evaluation of saliency-based color image indexing methods using wavelet salient features
Christophe Laurent, Nathalie Laurent, Mariette Maurizot, Thierry Dorval
Multim. Tools Appl.1
2003 A hybrid mesh-H264 video coder
abstract
This paper presents a video coding scheme combining H264 with a triangular mesh based representation. In this scheme, we developed a mesh-based motion estimator in which the motion vectors are computed at each node of the mesh. All other motion vectors are then interpolated using the nodes denoting the patches. Finally, this model is integrated in the RD optimized model of the H264 coder. To end, we propose some results, which compare H264 with our hybrid approach. This approach permits us to improve the quality of P and B images obtained by H264 for the same coding cost.
Nathalie Laurent, Alexandre Buisson, Christophe Laurent, Sébastien Brangoulo
ICIP (3)3
2003 A human skin detector combining mean shift analysis and watershed algorithm
abstract
Detecting human skin in color images is an interesting problem due to the potential number of target applications ranging from face detection to the detection of pornographic images. Many approaches have been proposed in literature including color thresholding, statistical skin color modeling and segmentation-based techniques. However, the performances often decrease in the presence of illumination artifacts resulting in sub-optimal results. In this paper, we propose a new method that is adaptive to the image content especially in illumination conditions. For this purpose, we first detect skin seeds that serve as the basis to locate the skin colors with highest density. This step allows to take into account illumination conditions for the last step, namely the growing of skin seeds.
Christophe Laurent, Nathalie Laurent, Yam Bodo
ICIP (3)1