Demo Data from EDBT 2026 / reviewers in the wild / expert
Wing Ning
dblp:01/2686
· DBLP profile ↗
1ranked-venue papers
1as first author
0since 2021 · last 1994
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 1 · 1 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Electronic design automation · 100% | |
| Theoretical computer science
1 paper |
Computational complexity · 100% |
Topics — the 3 heaviest of 3, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Electronic design automation › physical design
gate sizing |
0.0 | 1 | 1994 | Strongly NP-hard discrete gate-sizing problems · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1994 |
Electronic design automation
physical design |
0.0 | 1 | 1994 | Strongly NP-hard discrete gate-sizing problems · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1994 |
Computational complexity › computational hardness
strong NP-hardness |
0.0 | 1 | 1994 | Strongly NP-hard discrete gate-sizing problems · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1994 |
Methods — techniques the papers use, named apart from their topics
pseudo-polynomial time algorithm · 0.0complexity analysis · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 1994 | Strongly NP-hard discrete gate-sizing problemsabstractThe discrete gate-sizing problem has been studied by several researchers recently. Some complexity results have been obtained, and a number of heuristic algorithms have been proposed. For circuit networks that are restricted to the set of trees, or series-parallel graphs, pseudo-polynomial time algorithms to obtain the exact solution have also been proposed, though none can be extended to circuit networks that are arbitrary directed acyclic graphs (dags), We prove that the problem is strongly NP-hard. Our result implies that for arbitrary dags, there is no pseudo-polynomial time algorithm to obtain the exact solution unless P=NP. We also prove that the absolute approximation discrete gate sizing problem is strongly NP-hard. These results provide insight into the difficulties of the problem and may lead to better heuristics.> Wing Ning |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. | 1 |