Physics-based compact modeling, as opposed to the conventional empirical approach, is emphasized for nanoscale nonclassical CMOS. UFDG, a physics-based compact model for generic double-gate MOSFETs with ultra-thin bodies, is overviewed, and its applications to double- and (multiple) independent-gate FinFET device and circuit design are demonstrated.

A novel approach to integrated process/device/circuit simulation is proposed which allows pragmatic, computationally efficient IC technology CAD at the mixed-mode device/circuit level. The approach is demonstrated with a simulation system for advanced silicon bipolar technologies. This system comprises the process simulator SUPREM-3 integrated with the seminumerical mixed-mode device/circuit simulator MMSPICE by a program called SUMM. The integration is characterized by the unique evaluation of the physical (structure-dependent) parameters for the MMSPICE BJT model from a one-dimensional doping profile generated by SUPREM-3 without any optimization-based extraction. The capability of the application-specific SUMM/MMSPICE integrated system to reliably predict device characteristics and their sensitivities to process-flow variations is verified by measurements and by purely numerical simulations with PISCES-II. The utility of the system in IC technology development is exemplified by simulations.>

An non-quasi-static (NQS) model for transient current crowding in advanced bipolar junction transistors (BJTs) is presented. The model, which characterizes a time-dependent effective bias on the emitter-base junction in a seminumerical analysis, is intended for circuit simulation and has been implemented in MMSPICE. The novel modeling/implementation is based on the use of the previous time-step analysis, which is fact could allow general accounting for NQS effects in seminumerical mixed-mode device/circuit simulation. Demonstrative simulations, supported by purely numerical ones, show that, for the BJT switch-on transient, the NQS current crowding causes an added delay and tends to become insignificant only when the emitter width (W/sub E/) is scaled to deep-submicron values and that, for the switch-off transient, the added delay is negligible, at least for W/sub E/>

A method for experimentally selecting proper silicon-on-insulator MOSFET models for circuit simulation is described, verified, and demonstrated. The selection criteria are derived from steady-state current-voltage characteristics predicted by thin-film and (semi-)bulk models. The necessity for proper model selection is emphasized by revealing significant simulation errors that result from seemingly valid but actually empirical models.>

A novel methodology for flexible SPICE implementation of physical models for high-voltage power devices, accounting for their unique characteristics, is presented and demonstrated. The implementation is achieved without modifying the simulator code by utilizing user-defined controlled sources that reference a subroutine that defines the system of model equations. The simultaneous solution of the equations, which describe the integrated charges in the device and the quasistatic terminal currents in the terms of the terminal voltages, is effected by the SPICE2 nodal analysis. The methodology is exemplified by modeling the insulated-gate transistor (IGT). SPICE simulations of DC and transient characteristics of IGT switching circuits are discussed and shown to be representative of measurements. The flexibility of the modeling methodology for high-voltage integrated-circuit (HVIC) CAD is demonstrated by simulating effects of both static and dynamic latch-up in the merged bipolar/MOS structure of the IGT.>

A five-terminal, charge-based model for the thin-film silicon-on-insulator (SOI) MOSFET is implemented in SPICE2, thereby enabling, for the first time, proper simulation and CAD of SOI MOS integrated circuits in which the unique floating-body and back-gate-bias effects can be significant. The implementation is achieved, without having to rewrite the circuit simulator, by developing a general method for incorporating new charge-based device models into SPICE2 that utilizes user-defined controlled sources (UDCS's). The utility and computing efficiency of the SOI MOSFET model implementation are demonstrated by simulating several representative SOI MOS circuits.