Applications that rely on sparse or irregular data are often challenging to scale on modern distributed-memory systems. As a result, these systems typically require continuous load balancing in order to maintain efficiency. Work stealing is a common technique to remedy imbalance. In this work we present a strategy for work stealing that reduces the amount of communication required for a steal operation by half. We show that in exchange for a small amount of additional complexity to manage the local queue state we can combine both discovering and claiming work into a single step. Conventionally, work stealing uses a two step process of discovering work and then claiming it. Our system, SWS, provides a mechanism where both processes are performed in a singular communication without the need for multiple synchronization messages. This reduction in communication is possible with the novel application of atomic operations that manipulate a compact representation of task queue metadata. We demonstrate the effectiveness of this strategy using known benchmarks for testing dynamic load balancing systems and for performing unbalanced tree searches. Our results show the reduction in communication reduces task acquisition time and steal time, which in turn improves overall performance on sparse computations.

Realizing scalable performance with irregular parallel applications is challenging on large-scale distributed memory clusters. These applications typically require continuous, dynamic load balancing to maintain efficiency. Work stealing is a common approach to dynamic distributed load balancing. However its use in conjunction with advanced network offload capabilities is not well understood. We present a distributed work-stealing system that is amenable to acceleration using the Portals 4 network programming interface. Our work shows that the structures provided by Portals to handle two-sided communication are general-purpose and can accelerate work stealing. We demonstrate the effectiveness of this approach using known benchmarks from computational chemistry and for performing unbalanced tree searches. Results show that Portals accelerated work-stealing can greatly reduce communication overhead, task acquisition time, and termination detection.

Many HPC applications have successfully applied Partitioned Global Address Space (PGAS) parallel programming models to efficiently manage shared data that is distributed across multiple nodes in a distributed memory system. However, while the flat addressing model provided by PGAS systems is effective for regular array data, it renders such systems difficult to use with loosely-structured or sparse data. This work proposes a logically addressed PGLAS model that naturally supports a variety of data models through the automatic mapping of an application-defined key space onto the underlying distributed memory system. We present an efficient implementation of the PGLAS model built atop a parallel distributed hash table (PDHT) and demonstrate that this model is amenable to offloading using the Portals 4 network programming interface. We demonstrate the effectiveness of PDHT using representative applications from the computational chemistry and genomics domains. Results indicate that PGLAS models such as PDHT provide a promising new method for parallelizing applications with non-regular data.

This poster describes the operation and implementation of the E-Assess web-based program assessment tool. The E-Assess tool provides a centralized management system for generalized program assessment and has been used to support ABET program assessment within the CS/IS department at Coastal Carolina University for the past two years. This system defines multiple roles for several different assessment activities -- allowing individual faculty to operate independently, yet still providing an always up-to-date view of the process to assessment coordinators. Coordinators provide mappings between overall program objectives and specific measurement points across the curriculum. At the conclusion of a class, the instructor enters the assessment measures specific to the course. When all course data has been added, the E-Assess system automatically compiles the overall assessment data into summary reports that are used to evaluate program progress and to inform the continuous improvement process.

Modern robotics are at the locus of several related disciplines including computer science, mechanical engineering, electrical engineering, and others. The interleaving of these disciplines within a single robotic system can make teaching the fundamentals of robotics to undergraduate students within a traditional computer science curriculum a challenging task. One way to address this challenge is with an immersive, experiential approach that exposes students to these different facets of robot design in context. This poster describes the application of the Cognitive Apprenticeship (CA) framework to an undergraduate robotics course comprising of projects that touch on several different engineering disciplines. CA techniques are used to help students gain insight and understand how contributions from a variety of domains are interwoven to build a functioning robotic system. Throughout the class, students work on teams to complete projects at different levels of abstraction using two different robot platforms. Students learn about software design and implementation by constructing reactive paradigm behaviors on a Khepera III robot in the first part of the course. Later, students construct a quadcopter UAV from a kit, handling all aspects of construction, calibration, and configuration. This work focuses on two perspectives of this course: the use of the CA framework as a structure for experiential learning and also to describe a set of projects that emphasize the interdisciplinary nature of robotics.

This paper describes the adaptation of several common computer science courses to include the use of FPGA-based systems for project and assignment work. One of the principal challenges in modern curriculum design is balancing between breadth and depth of course topics while simultaneously reinforcing the interconnections among topics in the field. To address these challenges, faculty are often forced to approximate real-world systems, sometimes at the expense of any hands-on experience. At Coastal Carolina, we have integrated FPGA systems first used in our hardware-based courses into several higher-level systems and applications courses. This allows us to leverage student familiarity with a hands-on, flexible hardware platform and also strengthens the relationships between different subfields within computer science. We discuss both the changes made to our curriculum and the effectiveness of our approach.

This paper details the development and implementation of a summer robotics camp for middle school children. The Cognitive Apprenticeship (CA) model is used as the framework for developing the camp. Specifically, methods such as modeling, coaching, scaffolding, articulation, reflection, and exploration are integrated throughout the camp structure. Activities include the use of an engineering notebook, debugging logs, and various cognitive challenges, all supervised by a team of expert mentors. During the two-week summer camp, participants realized a positive shift in attitudes towards science, developed common engineering design skills, and showed increased proficiency in the reasoning pattern of isolation of variables. The CA framework, in conjunction with robotics are an excellent way to build interest in STEM and develop skills in engineering, science, and computational thinking.

One of the challenges in modern curriculum design is balancing between breadth and depth of topics while simultaneously reinforcing the interconnections among topics in the field. To address these challenges, faculty are often forced to approximate real-world systems, sometimes at the expense of any hands-on experience. We have integrated field-programming gate array (FPGA) systems first used in our hardware-based courses into several higher-level systems and applications courses. This allows us to leverage student familiarity with a hands-on, flexible hardware platform and also strengthen the relationships between different subfields within computer science. In this workshop, we present participants with guided hands-on activities for making use of FPGAs in common computer science courses such as digital logic design, computer organization and programming, and compiler construction. Laptop required.

The field of computer science is continuously growing, requiring curriculum developers to make numerous tradeoffs between depth and breadth with every advance. Faculty must look for new ways to communicate more concepts within a fixed number of contact hours as well as employ techniques that underscore interrelated concepts over multiple courses. With this poster, we present the use of field-programmable gate arrays (FPGAs) as a flexible hardware system that may be modified to suit the needs of a wide variety of classes. While FPGA devices are a natural fit for teaching hardware concepts in organization and architecture classes, we feel that they can also be used in a variety of roles within a number of other courses. We describe our work integrating FPGA curriculum modules into several courses in the CS curriculum: organization and architecture, compiler construction, robotics, operating systems, security, and image processing. We believe that by using these devices in several courses, students gain greater familiarity with a hands-on, reconfigurable hardware platform and can leverage this experience throughout their coursework. This approach is consonant with recent trends that emphasize the importance of students being able to reason about the end-to-end operation of an entire system and helps strengthen the relationships between different subfields within computer science. We describe both the changes made to our curriculum and the effectiveness of our approach.

Irregular and dynamic parallel applications pose significant challenges to achieving scalable performance on large-scale multicore clusters. These applications often require ongoing, dynamic load balancing in order to maintain efficiency. Scalable dynamic load balancing on large clusters is a challenging problem which can be addressed with distributed dynamic load balancing systems. Work stealing is a popular approach to distributed dynamic load balancing; however its performance on large-scale clusters is not well understood. Prior work on work stealing has largely focused on shared memory machines. In this work we investigate the design and scalability of work stealing on modern distributed memory systems. We demonstrate high efficiency and low overhead when scaling to 8,192 processors for three benchmark codes: a producer-consumer benchmark, the unbalanced tree search benchmark, and a multiresolution analysis kernel.

We introduce Scioto, shared collections of task objects, a lightweight framework for providing task management on distributed memory machines under one-sided and global-view parallel programming models. Scioto provides locality aware dynamic load balancing and interoperates with MPI, ARMCI, and global arrays. Additionally, Scioto's task model and programming interface are compatible with many other existing parallel models including UPC, SHMEM, and CAF. Through task parallelism, the Scioto framework provides a solution for overcoming irregularity, load imbalance, and heterogeneity as well as dynamic mapping of computation onto emerging architectures. In this paper, we present the design and implementation of the Scioto framework and demonstrate its effectiveness on the unbalanced tree search (UTS) benchmark and two quantum chemistry codes: the closed shell self-consistent field (SCF) method and a sparse tensor contraction kernel extracted from a coupled cluster computation. We explore the efficiency and scalability of Scioto through these sample applications and demonstrate that is offers low overhead, achieves good performance on heterogeneous and multicore clusters, and scales to hundreds of processors.

This paper describes the Global Trees (GT) system that provides a multi-layered interface to a global address space view of distributed tree data structures, while providing scalable performance on distributed memory systems. The Global Trees system utilizes coarse-grained data movement to enhance locality and communication efficiency. We describe the design and implementation of GT, illustrate its use in the context of a gravitational simulation application, and provide experimental results that demonstrate the effectiveness of the approach. The key benefits of using this system include efficient shared-memory style programming of distributed trees, tree-specific optimizations for data access and computation, and the ability to customize many aspects of GT to optimize application performance.