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Kazuo Yamaguchi

dblp:01/8504 · DBLP profile ↗
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4ranked-venue papers
3as first author
0since 2021 · last 1990
0000-0002-5439-7432ORCID · corroborated

Domains — the database's venue-derived domains; a paper can count in several

Computer networks · 4 · 3 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer networks
4 papers
Physical-layer communications · 45% Optical networks · 36% Routing and switching · 12%
Computer architecture, parallel and distributed computing, and storage systems
3 papers
Integrated circuit design · 100%

Topics — the 7 heaviest of 8, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Physical-layer communications
optical communication
0.021988
Gigabit receiver ICs for optical communications · IEEE J. Sel. Areas Commun. 1988
400 Mbit/s Optical Regenerator Integrated Circuits · IEEE J. Sel. Areas Commun. 1986
Integrated circuit design
analog and mixed-signal circuits
0.021988
Gigabit receiver ICs for optical communications · IEEE J. Sel. Areas Commun. 1988
400 Mbit/s Optical Regenerator Integrated Circuits · IEEE J. Sel. Areas Commun. 1986
Optical networks
optical signal processing
0.011990
A Broadband Access Network Based on Optical Signal Processing: The Photonic Highway · INFOCOM 1990
Physical-layer communications › signal processing for communications
signal regeneration
0.011986
400 Mbit/s Optical Regenerator Integrated Circuits · IEEE J. Sel. Areas Commun. 1986
Optical networks
fiber optic local area network
0.011985
A 200 Mbit/s Synchronous TDM Loop Optical LAN Suitable for Multiservice Integration · IEEE J. Sel. Areas Commun. 1985
Routing and switching
time slot assignment
0.011985
A 200 Mbit/s Synchronous TDM Loop Optical LAN Suitable for Multiservice Integration · IEEE J. Sel. Areas Commun. 1985
Internet architecture and protocols
metropolitan area network
0.011990
A Broadband Access Network Based on Optical Signal Processing: The Photonic Highway · INFOCOM 1990

Methods — techniques the papers use, named apart from their topics

bipolar process · 0.0bistable laser diode · 0.0
YearPublicationVenuePosition
1990 A Broadband Access Network Based on Optical Signal Processing: The Photonic Highway
abstract
A broadband access network, the photonic highway, which is based on optical signal processing (OSP) and consists of photonic access nodes (PANs), which process optical signals directly, is discussed. Each PAN has an optical drop/insert function. The authors focus on the configuration of the fiber network and access nodes and describe its application to a metropolitan area network (MAN) and a CATV distribution network. They also describe the basic experiments conducted to verify the proposed architecture using newly developed bistable laser diodes.>
Kazuo Yamaguchi, N. Fujimoto, H. Rokugawa, Takakiyo Nakagami, S. Yamakoshi
INFOCOM1
1988 Gigabit receiver ICs for optical communications
abstract
The authors discuss gigabit receiver ICs for optical communications, focusing on their circuit and package design, the performance of receivers that were fabricated, and their application to a 1.6 Gb/s optical receiver. The key technologies for the receivers are discussed, and a design based on these key technologies is proposed. The proposed design is used to fabricate six receiver ICs (eight chips) using an ultra-high-speed bipolar process with transistors having a unity gain bandwidth of 6-8 GHz. The receivers are suitable for long-haul optical transmission at bit rates up to 1.6 Gb/s. Experimental results show that the 1.6 Gb/s receiver has an optical dynamic range of more than 23 dB without any adjustment, and the received average optical power required to maintain a 10/sup -11/ error rate is less the -31 dBm.>
Kazuo Yamaguchi, Hiroo Kitasagami, Masaaki Kawai, Izumi Amemiya, Takashi Touge, Haruo Tamada, Masayuki Kokado, Masahiro Sugimoto
IEEE J. Sel. Areas Commun.1
1986 400 Mbit/s Optical Regenerator Integrated Circuits
abstract
This paper discusses 400 Mbit/s optical regenerator integrated circuits, focusing on their circuit architecture and performance, and describes their application to a 400 Mbit/s optical regenerator. The basic design concepts for high-speed regenerator IC's are discussed and a new integrated circuit architecture based on these design concepts is proposed. The proposed architecture of regenerator IC's is used to fabricate five IC chips (Reshaping IC, Retiming IC, Decision IC, LD driver IC, and dc-to-dc converter IC) using a high-speed bipolar process with transistors having a unity gain bandwidth of 5 GHz. The combination of these IC's can achieve submarine and terrestrial long-haul optical transmission at bit rates up to 450 Mbits/s. These IC's are applied to a 400 Mbit/s IC optical regenerator. Experimental results show that the IC optical regenerator has an optical dynamic range of more than 27 dB without any adjustment and received average optical power required to maintain a 10-11error rate is less than -38 dBm. Experimental results fully satisfy the system requirements, and the feasibility of commercial application is demonstrated.
Kazuo Yamaguchi, Hiroo Kitasagami, Mitsuhiro Motegi, Fumio Ogawa, H. Nishiomoto, Hiromu Iwamoto, Masayuki Kokado
IEEE J. Sel. Areas Commun.1
1985 A 200 Mbit/s Synchronous TDM Loop Optical LAN Suitable for Multiservice Integration
abstract
This paper describes a 200 Mbit/s multiservice optical local area network (LAN) using a synchronous TDM loop structure. The LAN consists of a central supervisory node and multiple service nodes connected by an optical fiber loop. Each service node supports communication channels which have access to allocated time slots in TDM frames continuously circulating on the loop. Multiple independent communication paths of various speeds up to 140 Mbits/s and various modes including point-to-point, ring, and multicast, can be provided between the channels on the loop. The ring will be useful to support ring networks, such as a token ring. The structure of this LAN is quite suitable for integration of multiple services, including video, image, data, and voice, since each service can independently choose its own speed, access method, and mode. In this development, various LSI-based high-speed hardware technologies including compact E/O and O/E modules, GaAs 4 × 4 matrix switch LSI's, and high-speed TDM-processor LSI's, which are versatilely applicable to high-speed LAN's ranging from 100 Mbits/s up to 560 Mbits/s, have been successfully introduced and compact LAN equipment has been obtained. This paper deals mainly with the system and hardware structure of this LAN, together with high-speed hardware technologies. An outline of firmware and network operation, and an application example are also described.
Takatoshi Minami, Kazuo Yamaguchi, Takakiyo Nakagami, Hirobumi Takanashi, Naoji Fujino, Hiroshi Hamano, Masuo Suyama, Kazuo Iguchi, Isao Yamada
IEEE J. Sel. Areas Commun.2