Demo Data from EDBT 2026 / reviewers in the wild / expert
Geoffray Lacourba
dblp:01/9944
· DBLP profile ↗
2ranked-venue papers
0as first author
0since 2021 · last 2015
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 2
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Interconnection networks and networks-on-chip · 77% Processor architecture and microarchitecture · 23% |
Topics — the 2 heaviest of 2, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Interconnection networks and networks-on-chip
arbitration |
0.2 | 1 | 2015 | A Lightweight Early Arbitration Method for Low-Latency Asynchronous 2D-Mesh NoC's · DAC 2015 |
Processor architecture and microarchitecture
asynchronous architecture |
0.1 | 1 | 2015 | A Lightweight Early Arbitration Method for Low-Latency Asynchronous 2D-Mesh NoC's · DAC 2015 |
Methods — techniques the papers use, named apart from their topics
early arbitration · 0.2
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2015 | A Lightweight Early Arbitration Method for Low-Latency Asynchronous 2D-Mesh NoC's
Weiwei Jiang 0002, Kshitij Bhardwaj, Geoffray Lacourba, Steven M. Nowick |
DAC | 3 |
| 2011 | A low-latency adaptive asynchronous interconnection network using bi-modal router nodesabstractA new bi-modal asynchronous arbitration node is introduced for use as a building block in an adaptive asynchronous interconnection network. The target network topology is a variant Mesh-of-Trees (MoT), combining a binary fan-out network (i.e. routing) and a binary fan-in network (i.e. arbitration) for each source-sink pair. The key feature of the new arbitration node is that it dynamically reconfigures based on the traffic it receives, entering a special “single-channel-bias” mode when the other channel has no recent activity. Arbitration is totally bypassed on the critical path, resulting in significantly lower node latency and, in high-traffic scenarios, improved throughput. The router nodes were implemented in IBM 90nm technology using ARM standard cells. SPICE simulations indicate that the bi-modal arbitration node provided significant reductions in latency (41.6%), and increased throughput (19.8%, in high-traffic single-channel scenarios), when in biased mode. Node reconfiguration required at most 338 ps. Simulations were then performed on two distinct MoT indirect networks, “baseline” and “adaptive” (the latter incorporating the new bi-modal node), on eight diverse synthetic benchmarks, using mixes of random and deterministic traffic. Improvements in system latency up to 19.8% and throughput up to 27.8% were obtained using the adaptive network. Overall end-to-end latencies, through 6 router nodes and 5 hops, of 1.8–2.8 ns (at 25% load) and throughputs of 0.27–1.8 Gigaflits/s (at saturation rate) were also observed. Categories and Subject Descriptors Gennette Gill, Sumedh S. Attarde, Geoffray Lacourba, Steven M. Nowick |
NOCS | 3 |