Bob L. Janssens

Demonstration venue · read-only. Every page can be browsed; the buttons that would change it are switched off. Create an account to run TaxoReview on your own data. A simulation from public publication records: the people listed were not invited and did not agree to review.

? Tutorial for this page

Demo Data from EDBT 2026 / reviewers in the wild / expert

dblp:02/1787 · DBLP profile ↗

← Back

1ranked-venue papers

0as first author

0since 2021 · last 1992

—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems

1 paper

Memory systems · 91% Processor architecture and microarchitecture · 9%

Topics — the 3 heaviest of 4, each with the papers that count most for it

Topic	Papers	Last	Evidence papers
Memory systems cache	1	1992	Stride directed prefetching in scalar processors · MICRO 1992
Memory systems › cache prefetching	1	1992	Stride directed prefetching in scalar processors · MICRO 1992
Memory systems › cache › prefetching stride prefetching	1	1992	Stride directed prefetching in scalar processors · MICRO 1992

Year	Publication	Venue	Position
1992	Stride directed prefetching in scalar processors John W. C. Fu, Janak H. Patel, Bob L. Janssens	MICRO	3